aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2011-12-15 22:25:36 +0000
committerGabor Juhos <juhosg@openwrt.org>2011-12-15 22:25:36 +0000
commit5bbd416e38cf6e0db31bb064068a43ab046a0684 (patch)
treebfb4796f95cf5f675368307fbc983fefb647f0a0 /target/linux
parente47a8c2bb26e64e9dd6a3a91c8967be1884c1f75 (diff)
downloadupstream-5bbd416e38cf6e0db31bb064068a43ab046a0684.tar.gz
upstream-5bbd416e38cf6e0db31bb064068a43ab046a0684.tar.bz2
upstream-5bbd416e38cf6e0db31bb064068a43ab046a0684.zip
ar71xx: add defines for the AR934X GMAC interface
SVN-Revision: 29556
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 47c2842baf..c391fee4a4 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -79,6 +79,8 @@
#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
#define AR934X_WMAC_SIZE 0x20000
+#define AR934X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
+#define AR934X_GMAC_SIZE 0x14
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x10000000
@@ -907,6 +909,25 @@ void ar71xx_flash_release(void);
#define AR933X_ETH_CFG_RMII_GE0_SPD_10 0
#define AR933X_ETH_CFG_RMII_GE0_SPD_100 BIT(10)
+/*
+ * AR934X GMAC Interface
+ */
+#define AR934X_GMAC_REG_ETH_CFG 0x00
+
+#define AR934X_ETH_CFG_RGMII_GMAC0 BIT(0)
+#define AR934X_ETH_CFG_MII_GMAC0 BIT(1)
+#define AR934X_ETH_CFG_GMII_GMAC0 BIT(2)
+#define AR934X_ETH_CFG_MII_GMAC0_MASTER BIT(3)
+#define AR934X_ETH_CFG_MII_GMAC0_SLAVE BIT(4)
+#define AR934X_ETH_CFG_MII_GMAC0_ERR_EN BIT(5)
+#define AR934X_ETH_CFG_SW_ONLY_MODE BIT(6)
+#define AR934X_ETH_CFG_SW_PHY_SWAP BIT(7)
+#define AR934X_ETH_CFG_SW_APB_ACCESS BIT(9)
+#define AR934X_ETH_CFG_RMII_GMAC0 BIT(10)
+#define AR933X_ETH_CFG_MII_CNTL_SPEED BIT(11)
+#define AR934X_ETH_CFG_RMII_GMAC0_MASTER BIT(12)
+#define AR933X_ETH_CFG_SW_ACC_MSB_FIRST BIT(13)
+
#endif /* __ASSEMBLER__ */
#endif /* __ASM_MACH_AR71XX_H */