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| author | Petr Štetiar <ynezz@true.cz> | 2019-11-05 21:51:23 +0100 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2019-11-06 00:26:40 +0100 |
| commit | c4fdb377a25589d4c2ac0e29c8e6e46516bd8b87 (patch) | |
| tree | 884aa62432e6bbb67ee14a3d6165cfea47672a69 /target/linux | |
| parent | d7ea38036323582c594d00890719132b95404484 (diff) | |
| download | upstream-c4fdb377a25589d4c2ac0e29c8e6e46516bd8b87.tar.gz upstream-c4fdb377a25589d4c2ac0e29c8e6e46516bd8b87.tar.bz2 upstream-c4fdb377a25589d4c2ac0e29c8e6e46516bd8b87.zip | |
Revert "ipq806x: fix EA8500 switch control"
There is a problem with the EA8500, the switch will not work after soft
reboot, the only way to get it working again is to power cycle it
manually.
There are probably several issues in the play, it's quite hard to fix it
without having access to the actual device, so I don't see any other
option now, then revert the offending commit.
Ref: PR#2047
Fixes: FS#2168 ("Switch no longer work after restart on Linksys EA8500")
Reported-by: Adam <424778940z@gmail.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
(cherry picked from commit 04d6753d03e3a6db07b7a2d3296774d0965bbbfa)
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts | 20 |
1 files changed, 4 insertions, 16 deletions
diff --git a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts index 91c358d245..ca8376afd7 100644 --- a/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts +++ b/target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts @@ -39,10 +39,6 @@ soc { pinmux@800000 { - - pinctrl-0 = <&switch_reset>; - pinctrl-names = "default"; - button_pins: button_pins { mux { pins = "gpio65", "gpio67", "gpio68"; @@ -70,16 +66,6 @@ }; }; - switch_reset: switch_reset_pins { - mux { - pins = "gpio63"; - function = "gpio"; - drive-strength = <2>; - bias-disable; - output-low; - }; - }; - mdio0_pins: mdio0_pins { mux { pins = "gpio0", "gpio1"; @@ -178,6 +164,10 @@ status = "ok"; }; + pcie2: pci@1b900000 { + status = "ok"; + }; + nand@1ac00000 { status = "ok"; @@ -408,5 +398,3 @@ }; }; -/delete-node/ &pcie2_pins; -/delete-node/ &pcie2; |