diff options
author | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 14:09:00 +0000 |
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committer | Gabor Juhos <juhosg@openwrt.org> | 2008-11-26 14:09:00 +0000 |
commit | 0bb95d57548c43224d97283f1461b78d8f9e5f35 (patch) | |
tree | 0b946732e1ea964207f8885be2efa1c35b19e620 /target/linux | |
parent | 5dceef538932df7aa01886954ee41d28178e98c3 (diff) | |
download | upstream-0bb95d57548c43224d97283f1461b78d8f9e5f35.tar.gz upstream-0bb95d57548c43224d97283f1461b78d8f9e5f35.tar.bz2 upstream-0bb95d57548c43224d97283f1461b78d8f9e5f35.zip |
ag71xx: dump additional registers in debug mode
SVN-Revision: 13361
Diffstat (limited to 'target/linux')
-rw-r--r-- | target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c | 2 | ||||
-rw-r--r-- | target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c | 10 |
2 files changed, 8 insertions, 4 deletions
diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c index 53376fa817..47fc674077 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c @@ -47,7 +47,7 @@ static void ag71xx_dump_regs(struct ag71xx *ag) ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); - DBG("%s: fifo_cfg3=%08x, fifo_cfg3=%08x, fifo_cfg5=%08x\n", + DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", ag->dev->name, ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c index 8728c7c7b9..9173b48ad5 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c @@ -140,15 +140,19 @@ static void ag71xx_phy_link_update(struct ag71xx *ag) ag71xx_speed_str(ag), (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); - DBG("%s: fifo1=%#x, fifo2=%#x, fifo3=%#x, fifo4=%#x, fifo5=%#x\n", + DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); + + DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", + ag->dev->name, ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); - DBG("%s: mac_cfg2=%#x, ifctl=%#x, mii_ctrl=%#x\n", + DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n", ag->dev->name, ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), |