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authorNicolas Thill <nico@openwrt.org>2007-08-18 15:40:31 +0000
committerNicolas Thill <nico@openwrt.org>2007-08-18 15:40:31 +0000
commit71fb2a6b6ef2d436ec11502968c7687bdbce7529 (patch)
tree9826ef3b4ab88ae1fba5de830b8a2a8561df5929 /target/linux
parent8ee968e68285441c48959c1f20594efd5ad20279 (diff)
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fix vlynq initialization (closes: #2135)
SVN-Revision: 8423
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c23
1 files changed, 11 insertions, 12 deletions
diff --git a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c
index 5856ece1d4..c9be214721 100644
--- a/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c
+++ b/target/linux/ar7-2.6/files/arch/mips/ar7/vlynq.c
@@ -299,21 +299,20 @@ int vlynq_device_enable(struct vlynq_device *dev)
dev->local->control = 0;
dev->remote->control = 0;
+ dev->local->control = VLYNQ_CTRL_CLOCK_INT;
div = ar7_dsp_freq() / 62500000;
- if(ar7_dsp_freq() / div != 62500000)
- {
- printk(KERN_WARNING
- "VLYNQ: Adjusted requested frequency %d to %d\n",
- 62500000, ar7_dsp_freq() / div);
- }
+ if (div != 0 ) {
+ if (ar7_dsp_freq() / div != 62500000) {
+ printk(KERN_WARNING
+ "VLYNQ: Adjusted requested frequency %d to %d\n",
+ 62500000, ar7_dsp_freq() / div);
+ }
- printk("VLYNQ: Setting clock to %d (clock divider %u)\n", ar7_dsp_freq() / div, div);
- dev->local->control = VLYNQ_CTRL_CLOCK_DIV((div - 1)) |
- VLYNQ_CTRL_CLOCK_INT;
-/*
- dev->local->control = VLYNQ_CTRL_CLOCK_INT;
-*/
+ printk("VLYNQ: Setting clock to %d (clock divider %u)\n",
+ ar7_dsp_freq() / div, div);
+ dev->local->control |= VLYNQ_CTRL_CLOCK_DIV((div - 1));
+ }
if (vlynq_linked(dev))
return vlynq_setup_irq(dev);