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| author | Gabor Juhos <juhosg@openwrt.org> | 2011-11-14 07:38:07 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2011-11-14 07:38:07 +0000 |
| commit | 6f6b5524735c6629af9546a14a121e8d99d4a9d9 (patch) | |
| tree | ad473e25ae161efc6cab0bab9348184e5b98f204 /target/linux | |
| parent | 75a88988407fdcd9ba1385dacbd8aaef7896a2d7 (diff) | |
| download | upstream-6f6b5524735c6629af9546a14a121e8d99d4a9d9.tar.gz upstream-6f6b5524735c6629af9546a14a121e8d99d4a9d9.tar.bz2 upstream-6f6b5524735c6629af9546a14a121e8d99d4a9d9.zip | |
ar71xx: force hardwired interface parameters in ar71xx_add_device_eth
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29102 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/ar71xx/files/arch/mips/ar71xx/devices.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c index b2dc0fbe55..16cb4f1c3e 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c @@ -821,10 +821,16 @@ void __init ar71xx_add_device_eth(unsigned int id) pdata->reset_bit |= RESET_MODULE_GE0_PHY; pdata->ddr_flush = ar724x_ddr_flush_ge0; pdata->set_speed = ar724x_set_speed_ge0; + + pdata->phy_mask = BIT(4); } else { pdata->reset_bit |= RESET_MODULE_GE1_PHY; pdata->ddr_flush = ar724x_ddr_flush_ge1; pdata->set_speed = ar724x_set_speed_ge1; + + pdata->speed = SPEED_1000; + pdata->duplex = DUPLEX_FULL; + pdata->has_ar7240_switch = 1; } pdata->has_gbit = 1; pdata->is_ar724x = 1; @@ -874,6 +880,10 @@ void __init ar71xx_add_device_eth(unsigned int id) AR933X_RESET_GE1_MDIO; pdata->ddr_flush = ar933x_ddr_flush_ge1; pdata->set_speed = ar933x_set_speed_ge1; + + pdata->speed = SPEED_1000; + pdata->duplex = DUPLEX_FULL; + pdata->has_ar7240_switch = 1; } pdata->has_gbit = 1; @@ -899,7 +909,7 @@ void __init ar71xx_add_device_eth(unsigned int id) pdata->reset_bit = AR934X_RESET_GE1_MAC | AR934X_RESET_GE1_MDIO; pdata->ddr_flush = ar934x_ddr_flush_ge1; - pdata->set_speed = ar934x_set_speed_ge1 + pdata->set_speed = ar934x_set_speed_ge1; } pdata->has_gbit = 1; |