aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2010-11-12 18:50:47 +0000
committerGabor Juhos <juhosg@openwrt.org>2010-11-12 18:50:47 +0000
commiteef802855a04348949af7fd748eab1ad5facb7a2 (patch)
treec0f35abd3b6bd775ff317a26d889946306125a13 /target/linux
parent500fac17357c37f07b9e8535b44d355d442b3b55 (diff)
downloadupstream-eef802855a04348949af7fd748eab1ad5facb7a2.tar.gz
upstream-eef802855a04348949af7fd748eab1ad5facb7a2.tar.bz2
upstream-eef802855a04348949af7fd748eab1ad5facb7a2.zip
ar71xx: fix trailing statements location
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> SVN-Revision: 23976
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c6
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c6
2 files changed, 8 insertions, 4 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c b/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
index 5d05562de0..6c88985ccf 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/ar71xx.c
@@ -157,10 +157,12 @@ EXPORT_SYMBOL_GPL(ar71xx_device_stopped);
void ar71xx_ddr_flush(u32 reg)
{
ar71xx_ddr_wr(reg, 1);
- while ((ar71xx_ddr_rr(reg) & 0x1));
+ while ((ar71xx_ddr_rr(reg) & 0x1))
+ ;
ar71xx_ddr_wr(reg, 1);
- while ((ar71xx_ddr_rr(reg) & 0x1));
+ while ((ar71xx_ddr_rr(reg) & 0x1))
+ ;
}
EXPORT_SYMBOL_GPL(ar71xx_ddr_flush);
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c b/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c
index 4661d970b0..76f69c562b 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/early_printk.c
@@ -23,8 +23,10 @@
void prom_putchar(unsigned char ch)
{
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+ while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+ ;
UART_WRITE(UART_TX, ch);
- while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0);
+ while (((UART_READ(UART_LSR)) & UART_LSR_THRE) == 0)
+ ;
}