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authorLucian Cristian <lucian.cristian@gmail.com>2018-07-17 17:09:14 +0800
committerJohn Crispin <john@phrozen.org>2018-07-30 10:43:34 +0200
commite6417390e0c993251a26c7bd459275f7b58aa749 (patch)
tree533b4b80a4291611c1cec0fef675c11bb95e6efe /target/linux
parentc7c807cb8c3fd6538101de885f66d4681785defe (diff)
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ath79: update qca9533 to new irq driver
Commit c7efc93 renamed controller name to qca,ar9340-intc and added some functions but qca9533.dtsi was overlooked. Correct the dtsi and adust it to the new format Add gmac and correct reset for cascaded irq and build-in switch Also add the reference clock to soc dtsi so we don't have to have it in every dts Signed-off-by: Lucian Cristian <lucian.cristian@gmail.com> Remove switch reset definition Fix gmac compatible string (We only need SW_PHY_SWAP and SW_PHY_ADDR_SWAP on qca953x so use ar9330-gmac instead of ar9340-gmac.) Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ath79/dts/qca9533.dtsi41
-rw-r--r--target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi11
2 files changed, 28 insertions, 24 deletions
diff --git a/target/linux/ath79/dts/qca9533.dtsi b/target/linux/ath79/dts/qca9533.dtsi
index ff1e77e070..0bcd006878 100644
--- a/target/linux/ath79/dts/qca9533.dtsi
+++ b/target/linux/ath79/dts/qca9533.dtsi
@@ -20,9 +20,11 @@
};
};
- ref: ref {
+ extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
+ clock-output-names = "ref";
+ clock-frequency = <25000000>;
};
ahb {
@@ -90,9 +92,7 @@
#pinctrl-cells = <2>;
jtag_disable_pins: pinmux_jtag_disable_pins {
- pinctrl-single,bits = <
- 0x40 0x2 0x2
- >;
+ pinctrl-single,bits = <0x40 0x2 0x2>;
};
};
@@ -101,9 +101,8 @@
reg = <0x18050000 0x48>;
#clock-cells = <1>;
- clocks = <&ref>;
- clock-names = "ref";
clock-output-names = "cpu", "ddr", "ahb";
+ clocks = <&extosc>;
};
wdt: wdt@18060008 {
@@ -124,15 +123,20 @@
#reset-cells = <1>;
intc2: interrupt-controller@2 {
- compatible = "qcom,qca9556-intc";
+ compatible = "qca,ar9340-intc";
+ interrupt-parent = <&cpuintc>;
interrupts = <2>;
interrupt-controller;
#interrupt-cells = <1>;
- qcom,pending-bits = <0x1f0>, /* pcie rc1 */
- <0xf>; /* wmac */
+ qca,int-status-addr = <0xac>;
+ qca,pending-bits = <0xf>, /* wmac */
+ <0x1f0>; /* pcie rc1 */
+
+ qca,ddr-wb-channel-interrupts = <0>, <1>;
+ qca,ddr-wb-channels = <&ddr_ctrl 4>, <&ddr_ctrl 3>;
};
};
@@ -148,7 +152,7 @@
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
interrupt-parent = <&intc2>;
- interrupts = <0>;
+ interrupts = <1>;
interrupt-controller;
#interrupt-cells = <1>;
@@ -158,12 +162,17 @@
status = "disabled";
};
- wmac: gmac@18100000 {
+ gmac: gmac@18070000 {
+ compatible = "qca,ar9330-gmac";
+ reg = <0x18070000 0x4>;
+ };
+
+ wmac: wmac@18100000 {
compatible = "qca,qca9530-wmac";
reg = <0x18100000 0x230000>;
- interrupt-parent = <&cpuintc>;
- interrupts = <2>;
+ interrupt-parent = <&intc2>;
+ interrupts = <0>;
status = "disabled";
};
@@ -204,6 +213,12 @@
};
+&cpuintc {
+ qca,ddr-wb-channel-interrupts = <3>, <4>, <5>;
+ qca,ddr-wb-channels = <&ddr_ctrl 2>, <&ddr_ctrl 0>,
+ <&ddr_ctrl 1>;
+};
+
&mdio0 {
resets = <&rst 22>;
reset-names = "mdio";
diff --git a/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi b/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi
index 7b4689d96c..870da3c042 100644
--- a/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi
+++ b/target/linux/ath79/dts/qca9533_glinet_ar300m.dtsi
@@ -9,13 +9,6 @@
compatible = "glinet,ar300m", "qca,qca9533";
model = "GL.iNet GL-AR300M";
- extosc: ref {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-output-names = "ref";
- clock-frequency = <25000000>;
- };
-
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
@@ -92,10 +85,6 @@
status = "okay";
};
-&pll {
- clocks = <&extosc>;
-};
-
&mdio0 {
status = "okay";