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authorDeng Qingfang <dengqf6@mail2.sysu.edu.cn>2018-12-25 23:03:24 +0800
committerMathias Kresin <dev@kresin.me>2018-12-29 16:03:30 +0100
commit0599cd90e185860bbddd7dea8899f29b82368050 (patch)
tree99c17c0e4db945908f5da57b1b2ca4f51a0e338d /target/linux
parent9f0e2335764674d0324dd90adb3e185cc8befe5f (diff)
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ramips: fix MT7621 dtsi
Fix SysTick reg Add uartlite2 and uartlite3 nodes Signed-off-by: Deng Qingfang <dengqf6@mail2.sysu.edu.cn>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/ramips/dts/mt7621.dtsi40
1 files changed, 38 insertions, 2 deletions
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index be4d8eeff9..77841a61d2 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -138,9 +138,9 @@
status = "disabled";
};
- systick: systick@d00 {
+ systick: systick@500 {
compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
- reg = <0xd00 0x10>;
+ reg = <0x500 0x10>;
resets = <&rstctrl 28>;
reset-names = "intc";
@@ -178,6 +178,42 @@
no-loopback-test;
};
+ uartlite2: uartlite2@d00 {
+ compatible = "ns16550a";
+ reg = <0xd00 0x100>;
+
+ clock-frequency = <50000000>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 27 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+
+ status = "disabled";
+ };
+
+ uartlite3: uartlite3@e00 {
+ compatible = "ns16550a";
+ reg = <0xe00 0x100>;
+
+ clock-frequency = <50000000>;
+
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SHARED 28 IRQ_TYPE_LEVEL_HIGH>;
+
+ reg-shift = <2>;
+ reg-io-width = <4>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+
+ status = "disabled";
+ };
+
spi0: spi@b00 {
status = "disabled";