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authorFelix Fietkau <nbd@nbd.name>2016-06-09 19:09:23 +0200
committerFelix Fietkau <nbd@nbd.name>2016-06-11 09:49:13 +0200
commiteed2f24c0d1138e9c46befd464548de538f0bb60 (patch)
treee7ea8c760567f9ceada0bc65cd9663f54abcdd2d /target/linux
parent9e45f9d63c797baab2b3bd2574990ee94d3f80cb (diff)
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kernel: fix mips MT_SMP kernel crash on cache flush
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch17
1 files changed, 17 insertions, 0 deletions
diff --git a/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch b/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch
new file mode 100644
index 0000000000..14a10ba147
--- /dev/null
+++ b/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch
@@ -0,0 +1,17 @@
+Fix crash on cache flush with the MT_SMP variant
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+
+--- a/arch/mips/mm/c-r4k.c
++++ b/arch/mips/mm/c-r4k.c
+@@ -60,8 +60,10 @@ static inline void r4k_on_each_cpu(void
+ * to restrict that call when a CM is not present because both
+ * CM-based SMP protocols (CMP & CPS) restrict index-based cache ops.
+ */
++#ifndef CONFIG_MIPS_MT_SMP
+ if (!mips_cm_present())
+ smp_call_function_many(&cpu_foreign_map, func, info, 1);
++#endif
+ func(info);
+ preempt_enable();
+ }