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authorFelix Fietkau <nbd@openwrt.org>2016-01-10 17:19:34 +0000
committerFelix Fietkau <nbd@openwrt.org>2016-01-10 17:19:34 +0000
commit826cfa577349b50bbc169fa242d4de81501017ad (patch)
tree7a5c5ab256b89e5ae06fc1bcaa2993f9a82d968b /target/linux
parent6c40914c0c637ee27ab513e734ef63e5a532cdb1 (diff)
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ar71xx: fix ap152 support
- ethernet gigabit pll - switch configuration - sysupgrade Signed-off-by: Roman Yeryomin <roman@advem.lv> SVN-Revision: 48187
Diffstat (limited to 'target/linux')
-rwxr-xr-xtarget/linux/ar71xx/base-files/etc/board.d/02_network1
-rwxr-xr-xtarget/linux/ar71xx/base-files/lib/upgrade/platform.sh1
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c1
3 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network
index 6b6c6a465f..190b6932a9 100755
--- a/target/linux/ar71xx/base-files/etc/board.d/02_network
+++ b/target/linux/ar71xx/base-files/etc/board.d/02_network
@@ -23,6 +23,7 @@ ubnt-unifi-outdoor)
;;
ap132 |\
+ap152 |\
wlr8100)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:lan" "4:lan" "5:lan" "1:wan"
diff --git a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
index e662524df5..1f6eaf2331 100755
--- a/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
+++ b/target/linux/ar71xx/base-files/lib/upgrade/platform.sh
@@ -184,6 +184,7 @@ platform_check_image() {
ap136-020 | \
ap135-020 | \
ap147-010 | \
+ ap152 | \
ap96 | \
bxu2000n-2-a1 | \
db120 | \
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
index a1eb06b984..e669325f50 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
@@ -132,7 +132,6 @@ static void __init ap152_setup(void)
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
- ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}