Add 2.6.37 support

SVN-Revision: 24914

1 files changed, 90 insertions, 0 deletions

diff --git a/target/linux/xburst/patches-2.6.37/302-nand-fixes.patch b/target/linux/xburst/patches-2.6.37/302-nand-fixes.patch
new file mode 100644
index 0000000000..189c0f0f56
--- /dev/null
+++ b/target/linux/xburst/patches-2.6.37/302-nand-fixes.patch
@@ -0,0 +1,90 @@
+From 3ac9f7e0bc48b3c9ab6529410a2b8f3f9eac5bc5 Mon Sep 17 00:00:00 2001
+From: Lars-Peter Clausen <lars@metafoo.de>
+Date: Wed, 10 Nov 2010 11:29:36 +0100
+Subject: [PATCH 20/23] MTD: NAND: jz4740: Make 'struct platform_driver jz_nand_driver' static
+
+Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
+---
+ drivers/mtd/nand/jz4740_nand.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+--- a/drivers/mtd/nand/jz4740_nand.c
++++ b/drivers/mtd/nand/jz4740_nand.c
+@@ -251,58 +251,6 @@ static int jz_nand_correct_ecc_rs(struct
+ 	return 0;
+ }
+ 
+-
+-/* Copy paste of nand_read_page_hwecc_oob_first except for different eccpos
+- * handling. The ecc area is for 4k chips 72 bytes long and thus does not fit
+- * into the eccpos array. */
+-static int jz_nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
+-	struct nand_chip *chip, uint8_t *buf, int page)
+-{
+-	int i, eccsize = chip->ecc.size;
+-	int eccbytes = chip->ecc.bytes;
+-	int eccsteps = chip->ecc.steps;
+-	uint8_t *p = buf;
+-	unsigned int ecc_offset = chip->page_shift;
+-
+-	/* Read the OOB area first */
+-	chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
+-	chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
+-	chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+-
+-	for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+-		int stat;
+-
+-		chip->ecc.hwctl(mtd, NAND_ECC_READ);
+-		chip->read_buf(mtd, p, eccsize);
+-
+-		stat = chip->ecc.correct(mtd, p, &chip->oob_poi[i], NULL);
+-		if (stat < 0)
+-			mtd->ecc_stats.failed++;
+-		else
+-			mtd->ecc_stats.corrected += stat;
+-	}
+-	return 0;
+-}
+-
+-/* Copy-and-paste of nand_write_page_hwecc with different eccpos handling. */
+-static void jz_nand_write_page_hwecc(struct mtd_info *mtd,
+-	struct nand_chip *chip, const uint8_t *buf)
+-{
+-	int i, eccsize = chip->ecc.size;
+-	int eccbytes = chip->ecc.bytes;
+-	int eccsteps = chip->ecc.steps;
+-	const uint8_t *p = buf;
+-	unsigned int ecc_offset = chip->page_shift;
+-
+-	for (i = ecc_offset; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+-		chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
+-		chip->write_buf(mtd, p, eccsize);
+-		chip->ecc.calculate(mtd, p, &chip->oob_poi[i]);
+-	}
+-
+-	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
+-}
+-
+ #ifdef CONFIG_MTD_CMDLINE_PARTS
+ static const char *part_probes[] = {"cmdline", NULL};
+ #endif
+@@ -393,9 +341,6 @@ static int __devinit jz_nand_probe(struc
+ 	chip->ecc.size		= 512;
+ 	chip->ecc.bytes		= 9;
+ 
+-	chip->ecc.read_page	= jz_nand_read_page_hwecc_oob_first;
+-	chip->ecc.write_page	= jz_nand_write_page_hwecc;
+-
+ 	if (pdata)
+ 		chip->ecc.layout = pdata->ecc_layout;
+ 
+@@ -489,7 +434,7 @@ static int __devexit jz_nand_remove(stru
+ 	return 0;
+ }
+ 
+-struct platform_driver jz_nand_driver = {
++static struct platform_driver jz_nand_driver = {
+ 	.probe = jz_nand_probe,
+ 	.remove = __devexit_p(jz_nand_remove),
+ 	.driver = {