sunxi: copy config and patches from 4.19 to 5.4

Signed-off-by: Aleksander Jan Bajkowski <A.Bajkowski@stud.elka.pw.edu.pl>

5 files changed, 274 insertions, 0 deletions

diff --git a/target/linux/sunxi/patches-5.4/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch b/target/linux/sunxi/patches-5.4/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch
new file mode 100644
index 0000000000..74e51c094c
--- /dev/null
+++ b/target/linux/sunxi/patches-5.4/010-v5.3-drivers-ata-ahci_sunxi-Increased-SATA-AHCI-DMA-TX-RX.patch
@@ -0,0 +1,94 @@
+From 120357ea176e420d313cf8cf2ff35fbe233d3bab Mon Sep 17 00:00:00 2001
+From: Uenal Mutlu <um@mutluit.com>
+Date: Mon, 13 May 2019 16:24:10 +0200
+Subject: [PATCH] drivers: ata: ahci_sunxi: Increased SATA/AHCI DMA TX/RX FIFOs
+
+Increasing the SATA/AHCI DMA TX/RX FIFOs (P0DMACR.TXTS and .RXTS, ie.
+TX_TRANSACTION_SIZE and RX_TRANSACTION_SIZE) from default 0x0 each
+to 0x3 each, gives a write performance boost of 120 MiB/s to 132 MiB/s
+from lame 36 MiB/s to 45 MiB/s previously.
+Read performance is above 200 MiB/s.
+[tested on SSD using dd bs=4K/8K/12K/16K/20K/24K/32K: peak-perf at 12K]
+
+Tested on the SBCs Banana Pi R1 (aka Lamobo R1) and Banana Pi M1 which
+are based on the Allwinner A20 32bit-SoC (ARMv7-a / arm-linux-gnueabihf).
+These devices are RaspberryPi-like small devices.
+
+This problem of slow SATA write-speed with these small devices lasts
+for about 7 years now (beginning with the A10 SoC). Many commentators
+throughout the years wrongly assumed the slow write speed was a
+hardware limitation. This patch finally solves the problem, which
+in fact was just a hard-to-find software problem due to lack of
+SATA/AHCI documentation by the SoC-maker Allwinner Technology.
+
+Lists of the affected sunxi and other boards and SoCs with SATA using
+the ahci_sunxi driver:
+  $ grep -i -e "^&ahci" arch/arm/boot/dts/sun*dts
+  and http://linux-sunxi.org/SATA#Devices_with_SATA_ports
+  See also http://linux-sunxi.org/Category:Devices_with_SATA_port
+
+Tested-by: Chen-Yu Tsai <wens@csie.org>
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Reviewed-by: Hans de Goede <hdegoede@redhat.com>
+Signed-off-by: Uenal Mutlu <um@mutluit.com>
+Signed-off-by: Jens Axboe <axboe@kernel.dk>
+---
+ drivers/ata/ahci_sunxi.c | 47 ++++++++++++++++++++++++++++++++++++++--
+ 1 file changed, 45 insertions(+), 2 deletions(-)
+
+--- a/drivers/ata/ahci_sunxi.c
++++ b/drivers/ata/ahci_sunxi.c
+@@ -157,8 +157,51 @@ static void ahci_sunxi_start_engine(stru
+ 	void __iomem *port_mmio = ahci_port_base(ap);
+ 	struct ahci_host_priv *hpriv = ap->host->private_data;
+ 
+-	/* Setup DMA before DMA start */
+-	sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ff00, 0x00004400);
++	/* Setup DMA before DMA start
++	 *
++	 * NOTE: A similar SoC with SATA/AHCI by Texas Instruments documents
++	 *   this Vendor Specific Port (P0DMACR, aka PxDMACR) in its
++	 *   User's Guide document (TMS320C674x/OMAP-L1x Processor
++	 *   Serial ATA (SATA) Controller, Literature Number: SPRUGJ8C,
++	 *   March 2011, Chapter 4.33 Port DMA Control Register (P0DMACR),
++	 *   p.68, https://www.ti.com/lit/ug/sprugj8c/sprugj8c.pdf)
++	 *   as equivalent to the following struct:
++	 *
++	 *   struct AHCI_P0DMACR_t
++	 *   {
++	 *     unsigned TXTS     : 4;
++	 *     unsigned RXTS     : 4;
++	 *     unsigned TXABL    : 4;
++	 *     unsigned RXABL    : 4;
++	 *     unsigned Reserved : 16;
++	 *   };
++	 *
++	 *   TXTS: Transmit Transaction Size (TX_TRANSACTION_SIZE).
++	 *     This field defines the DMA transaction size in DWORDs for
++	 *     transmit (system bus read, device write) operation. [...]
++	 *
++	 *   RXTS: Receive Transaction Size (RX_TRANSACTION_SIZE).
++	 *     This field defines the Port DMA transaction size in DWORDs
++	 *     for receive (system bus write, device read) operation. [...]
++	 *
++	 *   TXABL: Transmit Burst Limit.
++	 *     This field allows software to limit the VBUSP master read
++	 *     burst size. [...]
++	 *
++	 *   RXABL: Receive Burst Limit.
++	 *     Allows software to limit the VBUSP master write burst
++	 *     size. [...]
++	 *
++	 *   Reserved: Reserved.
++	 *
++	 *
++	 * NOTE: According to the above document, the following alternative
++	 *   to the code below could perhaps be a better option
++	 *   (or preparation) for possible further improvements later:
++	 *     sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff,
++	 *		0x00000033);
++	 */
++	sunxi_clrsetbits(hpriv->mmio + AHCI_P0DMACR, 0x0000ffff, 0x00004433);
+ 
+ 	/* Start DMA */
+ 	sunxi_setbits(port_mmio + PORT_CMD, PORT_CMD_START);
diff --git a/target/linux/sunxi/patches-5.4/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch b/target/linux/sunxi/patches-5.4/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch
new file mode 100644
index 0000000000..ef7867af81
--- /dev/null
+++ b/target/linux/sunxi/patches-5.4/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch
@@ -0,0 +1,26 @@
+From 55ec26d6a4241363fa94f15377ebd8f1116fbfd7 Mon Sep 17 00:00:00 2001
+From: Samuel Holland <samuel@sholland.org>
+Date: Sat, 12 Jan 2019 20:17:19 -0600
+Subject: [PATCH] arm64: dts: allwinner: a64: Enable A64 timer workaround
+
+As instability in the architectural timer has been observed on multiple
+devices using this SoC, inluding the Pine64 and the Orange Pi Win,
+enable the workaround in the SoC's device tree.
+
+Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
+Signed-off-by: Samuel Holland <samuel@sholland.org>
+Signed-off-by: Chen-Yu Tsai <wens@csie.org>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -159,6 +159,7 @@
+ 
+ 	timer {
+ 		compatible = "arm,armv8-timer";
++		allwinner,erratum-unknown1;
+ 		interrupts = <GIC_PPI 13
+ 			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
+ 			     <GIC_PPI 14
diff --git a/target/linux/sunxi/patches-5.4/301-orangepi_pc2_usb_otg_to_host_key_power.patch b/target/linux/sunxi/patches-5.4/301-orangepi_pc2_usb_otg_to_host_key_power.patch
new file mode 100644
index 0000000000..af243ca3e7
--- /dev/null
+++ b/target/linux/sunxi/patches-5.4/301-orangepi_pc2_usb_otg_to_host_key_power.patch
@@ -0,0 +1,20 @@
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+@@ -98,7 +98,7 @@
+ 
+ 		sw4 {
+ 			label = "sw4";
+-			linux,code = <BTN_0>;
++			linux,code = <KEY_POWER>;
+ 			gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ 		};
+ 	};
+@@ -238,7 +238,7 @@
+ };
+ 
+ &usb_otg {
+-	dr_mode = "otg";
++	dr_mode = "host";
+ 	status = "okay";
+ };
+ 
diff --git a/target/linux/sunxi/patches-5.4/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch b/target/linux/sunxi/patches-5.4/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch
new file mode 100644
index 0000000000..1d58b7bcba
--- /dev/null
+++ b/target/linux/sunxi/patches-5.4/310-Revert-ARM-dts-sun7i-Add-BCM53125-switch-nodes-to-th.patch
@@ -0,0 +1,88 @@
+From 49cd9ea6dc8d68eb519ccd9f31c9730dec8a181a Mon Sep 17 00:00:00 2001
+From: Hauke Mehrtens <hauke@hauke-m.de>
+Date: Thu, 8 Mar 2018 22:14:50 +0100
+Subject: [PATCH] Revert "ARM: dts: sun7i: Add BCM53125 switch nodes to the
+ lamobo-r1 board"
+
+This reverts the changes needed for the upstream b53 DSA switch driver 
+to use the OpenWrt b43 swconfig switch driver.
+
+This reverts commit 0cdefd5b5485ee6eb3512a75739d09a4090176ed.
+This reverts commit d7b9eaff5f0ca00726336b4c0c3c29decf30412a.
+---
+ arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts | 60 ++-----------------------------
+ 1 file changed, 3 insertions(+), 57 deletions(-)
+
+--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
++++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+@@ -124,67 +124,13 @@
+ &gmac {
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&gmac_pins_rgmii_a>;
++	phy = <&phy1>;
+ 	phy-mode = "rgmii";
+ 	phy-supply = <&reg_gmac_3v3>;
+ 	status = "okay";
+ 
+-	fixed-link {
+-		speed = <1000>;
+-		full-duplex;
+-	};
+-
+-	mdio {
+-		compatible = "snps,dwmac-mdio";
+-		#address-cells = <1>;
+-		#size-cells = <0>;
+-
+-		switch: ethernet-switch@1e {
+-			compatible = "brcm,bcm53125";
+-			reg = <30>;
+-			#address-cells = <1>;
+-			#size-cells = <0>;
+-
+-			ports {
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-
+-				port0: port@0 {
+-					reg = <0>;
+-					label = "lan2";
+-				};
+-
+-				port1: port@1 {
+-					reg = <1>;
+-					label = "lan3";
+-				};
+-
+-				port2: port@2 {
+-					reg = <2>;
+-					label = "lan4";
+-				};
+-
+-				port3: port@3 {
+-					reg = <3>;
+-					label = "wan";
+-				};
+-
+-				port4: port@4 {
+-					reg = <4>;
+-					label = "lan1";
+-				};
+-
+-				port8: port@8 {
+-					reg = <8>;
+-					label = "cpu";
+-					ethernet = <&gmac>;
+-					phy-mode = "rgmii-txid";
+-					fixed-link {
+-						speed = <1000>;
+-						full-duplex;
+-					};
+-				};
+-			};
+-		};
++	phy1: ethernet-phy@1 {
++		reg = <1>;
+ 	};
+ };
+ 
diff --git a/target/linux/sunxi/patches-5.4/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch b/target/linux/sunxi/patches-5.4/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch
new file mode 100644
index 0000000000..ee70abee27
--- /dev/null
+++ b/target/linux/sunxi/patches-5.4/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch
@@ -0,0 +1,46 @@
+From 7d87d3dafc4b1ea5659eb71ee6c5fd5308490d1f Mon Sep 17 00:00:00 2001
+From: Oskari Lemmela <oskari@lemmela.net>
+Date: Mon, 31 Dec 2018 07:44:49 +0200
+Subject: [PATCH] arm64: allwinner: a64-sopine: Add Sopine flash partitions.
+
+First 896kB to u-boot. Enough space for SPL, u-boot and ATF.
+Next 128kB to u-boot environment and rest to firmware.
+
+Firmware partition is compatible FIT image dynamic splitting.
+
+Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
+---
+ .../boot/dts/allwinner/sun50i-a64-sopine.dtsi | 22 +++++++++++++++++++
+ 1 file changed, 22 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
+@@ -78,6 +78,28 @@
+ 		compatible = "jedec,spi-nor";
+ 		reg = <0>;
+ 		spi-max-frequency = <40000000>;
++
++		partitions {
++			compatible = "fixed-partitions";
++			#address-cells = <1>;
++			#size-cells = <1>;
++
++			partition@0 {
++				label = "u-boot";
++				reg = <0x000000 0x0E0000>;
++			};
++
++			partition@e0000 {
++				label = "u-boot-env";
++				reg = <0x0E0000 0x020000>;
++			};
++
++			partition@100000 {
++				compatible = "denx,fit";
++				label = "firmware";
++				reg = <0x100000 0xF00000>;
++			};
++		};
+ 	};
+ };
+