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authorHauke Mehrtens <hauke@hauke-m.de>2017-09-21 22:38:00 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2017-10-01 13:01:03 +0200
commitcf039cf7ffba5cdb15a25ad51b5e62e083bac5a8 (patch)
treed43a1bf3c8f276383a209609195b19069facaea5 /target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch
parented43a4d4ac195bf3c149805094b628a0d45f8880 (diff)
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sunxi: A64: add device tree changes for A64 Ethernet
This adds the device tree changes needed to make the GMAC stmmac driver working for the Allwinner A64 SoCs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch')
-rw-r--r--target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch69
1 files changed, 69 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch b/target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch
new file mode 100644
index 0000000000..e59c3e8735
--- /dev/null
+++ b/target/linux/sunxi/patches-4.9/0061-arm64-allwinner-sun50i-a64-add-dwmac-sun8i-Ethernet-.patch
@@ -0,0 +1,69 @@
+From e53f67e981bcc5547857475241b3a4a066955f8c Mon Sep 17 00:00:00 2001
+From: Corentin Labbe <clabbe.montjoie@gmail.com>
+Date: Wed, 31 May 2017 09:18:46 +0200
+Subject: arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver
+
+The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit
+connections. It is very similar to the device found in the Allwinner
+H3, but lacks the internal 100 Mbit PHY and its associated control
+bits.
+This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps
+it disabled at this level.
+
+Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++
+ 1 file changed, 35 insertions(+)
+
+--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+@@ -284,6 +284,21 @@
+ bias-pull-up;
+ };
+
++ rmii_pins: rmii_pins {
++ pins = "PD10", "PD11", "PD13", "PD14", "PD17",
++ "PD18", "PD19", "PD20", "PD22", "PD23";
++ function = "emac";
++ drive-strength = <40>;
++ };
++
++ rgmii_pins: rgmii_pins {
++ pins = "PD8", "PD9", "PD10", "PD11", "PD12",
++ "PD13", "PD15", "PD16", "PD17", "PD18",
++ "PD19", "PD20", "PD21", "PD22", "PD23";
++ function = "emac";
++ drive-strength = <40>;
++ };
++
+ uart0_pins_a: uart0@0 {
+ pins = "PB8", "PB9";
+ function = "uart0";
+@@ -388,6 +403,26 @@
+ #size-cells = <0>;
+ };
+
++ emac: ethernet@1c30000 {
++ compatible = "allwinner,sun50i-a64-emac";
++ syscon = <&syscon>;
++ reg = <0x01c30000 0x100>;
++ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "macirq";
++ resets = <&ccu RST_BUS_EMAC>;
++ reset-names = "stmmaceth";
++ clocks = <&ccu CLK_BUS_EMAC>;
++ clock-names = "stmmaceth";
++ status = "disabled";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ mdio: mdio {
++ #address-cells = <1>;
++ #size-cells = <0>;
++ };
++ };
++
+ gic: interrupt-controller@1c81000 {
+ compatible = "arm,gic-400";
+ reg = <0x01c81000 0x1000>,