sunxi: Add support for kernel 4.14

This is based on the code for kernel 4.9, but a lot of 4.9 patches are
backports from more recent kernel version and can be removed now.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

1 files changed, 92 insertions, 0 deletions

diff --git a/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch b/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch
new file mode 100644
index 0000000000..8e8fdafca5
--- /dev/null
+++ b/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch
@@ -0,0 +1,92 @@
+From 5f0bb9d0bc545ef53a83f7bd176fdc0736eed8e5 Mon Sep 17 00:00:00 2001
+From: Jens Kuske <jenskuske@gmail.com>
+Date: Tue, 27 Oct 2015 17:50:24 +0100
+Subject: [PATCH] reset: sunxi: Add Allwinner H3 bus resets
+
+The H3 bus resets have some holes between the registers, so we add
+an of_xlate() function to skip them according to the datasheet.
+
+Signed-off-by: Jens Kuske <jenskuske@gmail.com>
+---
+ .../bindings/reset/allwinner,sunxi-clock-reset.txt |  1 +
+ drivers/reset/reset-sunxi.c                        | 30 +++++++++++++++++++---
+ 2 files changed, 28 insertions(+), 3 deletions(-)
+
+--- a/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt
++++ b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt
+@@ -8,6 +8,7 @@ Required properties:
+ - compatible: Should be one of the following:
+   "allwinner,sun6i-a31-ahb1-reset"
+   "allwinner,sun6i-a31-clock-reset"
++  "allwinner,sun8i-h3-bus-reset"
+ - reg: should be register base and length as documented in the
+   datasheet
+ - #reset-cells: 1, see below
+--- a/drivers/reset/reset-sunxi.c
++++ b/drivers/reset/reset-sunxi.c
+@@ -77,7 +77,9 @@ static const struct reset_control_ops su
+ 	.deassert	= sunxi_reset_deassert,
+ };
+ 
+-static int sunxi_reset_init(struct device_node *np)
++static int sunxi_reset_init(struct device_node *np,
++			    int (*of_xlate)(struct reset_controller_dev *rcdev,
++				    const struct of_phandle_args *reset_spec))
+ {
+ 	struct sunxi_reset_data *data;
+ 	struct resource res;
+@@ -110,6 +112,7 @@ static int sunxi_reset_init(struct devic
+ 	data->rcdev.nr_resets = size * 8;
+ 	data->rcdev.ops = &sunxi_reset_ops;
+ 	data->rcdev.of_node = np;
++	data->rcdev.of_xlate = of_xlate;
+ 
+ 	return reset_controller_register(&data->rcdev);
+ 
+@@ -118,6 +121,21 @@ err_alloc:
+ 	return ret;
+ };
+ 
++static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev,
++				    const struct of_phandle_args *reset_spec)
++{
++	unsigned int index = reset_spec->args[0];
++
++	if (index < 96)
++		return index;
++	else if (index < 128)
++		return index + 32;
++	else if (index < 160)
++		return index + 64;
++	else
++		return -EINVAL;
++}
++
+ /*
+  * These are the reset controller we need to initialize early on in
+  * our system, before we can even think of using a regular device
+@@ -125,15 +143,21 @@ err_alloc:
+  */
+ static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = {
+ 	{ .compatible = "allwinner,sun6i-a31-ahb1-reset", },
++	{ .compatible = "allwinner,sun8i-h3-bus-reset", .data = sun8i_h3_bus_reset_xlate, },
+ 	{ /* sentinel */ },
+ };
+ 
+ void __init sun6i_reset_init(void)
+ {
+ 	struct device_node *np;
+-
+-	for_each_matching_node(np, sunxi_early_reset_dt_ids)
+-		sunxi_reset_init(np);
++	const struct of_device_id *match;
++	int (*of_xlate)(struct reset_controller_dev *rcdev,
++			const struct of_phandle_args *reset_spec);
++
++	for_each_matching_node_and_match(np, sunxi_early_reset_dt_ids, &match) {
++		of_xlate = match->data;
++		sunxi_reset_init(np, of_xlate);
++	}
+ }
+ 
+ /*