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author | Imre Kaloz <kaloz@openwrt.org> | 2014-02-13 13:27:14 +0000 |
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committer | Imre Kaloz <kaloz@openwrt.org> | 2014-02-13 13:27:14 +0000 |
commit | 2aeabcb857e32494bdb8385a2fb5c8c529fe35be (patch) | |
tree | 7a8f6420d307615cbedc82fbc6ad2e498a5a1ca8 /target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch | |
parent | 87573f9583f900bc82fe435ebbcff8dd72c88205 (diff) | |
download | upstream-2aeabcb857e32494bdb8385a2fb5c8c529fe35be.tar.gz upstream-2aeabcb857e32494bdb8385a2fb5c8c529fe35be.tar.bz2 upstream-2aeabcb857e32494bdb8385a2fb5c8c529fe35be.zip |
upgrade 3.13 targets to 3.13.2, refresh patches
Signed-off-by: Imre Kaloz <kaloz@openwrt.org
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39582 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch | 9 |
1 files changed, 1 insertions, 8 deletions
diff --git a/target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch b/target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch index c13d9911c0..3b5284bc53 100644 --- a/target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch +++ b/target/linux/sunxi/patches-3.13/200-sun5i-timer-add-support-for-reset-ctrler.patch @@ -13,8 +13,6 @@ Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> drivers/clocksource/timer-sun5i.c | 6 ++++++ 2 files changed, 10 insertions(+) -diff --git a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt -index 7c26154..27cfc7d 100644 --- a/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt +++ b/Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.txt @@ -9,6 +9,9 @@ Required properties: @@ -33,8 +31,6 @@ index 7c26154..27cfc7d 100644 clocks = <&ahb1_gates 19>; + resets = <&ahb1rst 19>; }; -diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c -index bddc522..f74d75e 100644 --- a/drivers/clocksource/timer-sun5i.c +++ b/drivers/clocksource/timer-sun5i.c @@ -16,6 +16,7 @@ @@ -53,7 +49,7 @@ index bddc522..f74d75e 100644 unsigned long rate; struct clk *clk; int ret, irq; -@@ -162,6 +164,10 @@ static void __init sun5i_timer_init(struct device_node *node) +@@ -162,6 +164,10 @@ static void __init sun5i_timer_init(stru clk_prepare_enable(clk); rate = clk_get_rate(clk); @@ -64,6 +60,3 @@ index bddc522..f74d75e 100644 writel(~0, timer_base + TIMER_INTVAL_LO_REG(1)); writel(TIMER_CTL_ENABLE | TIMER_CTL_RELOAD, timer_base + TIMER_CTL_REG(1)); --- -1.8.5.1 - |