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authorZoltan Herpai <wigyori@uid0.hu>2014-02-05 08:42:28 +0000
committerZoltan Herpai <wigyori@uid0.hu>2014-02-05 08:42:28 +0000
commitc957af0a0f6a2c45b9b3c84f45f4a3aa44d293c6 (patch)
treef8e3bda571dab7f80fdd240541ed8bd1d39b179e /target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch
parent66543935db1d7eab23fc43b381e56dbd4424b499 (diff)
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sunxi: initial 3.13 support
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> SVN-Revision: 39471
Diffstat (limited to 'target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch')
-rw-r--r--target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch b/target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch
new file mode 100644
index 0000000000..b209b125fe
--- /dev/null
+++ b/target/linux/sunxi/patches-3.13/146-2-dt-sun5i-a13-add-hstimer.patch
@@ -0,0 +1,38 @@
+From 22a3eff19679e0e592e061201690670a2f5fdba7 Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Thu, 7 Nov 2013 12:01:48 +0100
+Subject: [PATCH] ARM: sun5i: a13: Add support for the High Speed Timers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The Allwinner A13 has support for two high speed timers. Now that we
+have a driver to support it, we can enable them in the device tree.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+Tested-by: Emilio López <emilio@elopez.com.ar>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ arch/arm/boot/dts/sun5i-a13.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
+index ce8ef2a..1ccd75d 100644
+--- a/arch/arm/boot/dts/sun5i-a13.dtsi
++++ b/arch/arm/boot/dts/sun5i-a13.dtsi
+@@ -273,5 +273,12 @@
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
++
++ timer@01c60000 {
++ compatible = "allwinner,sun5i-a13-hstimer";
++ reg = <0x01c60000 0x1000>;
++ interrupts = <82>, <83>;
++ clocks = <&ahb_gates 28>;
++ };
+ };
+ };
+--
+1.8.5.1
+