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author | Imre Kaloz <kaloz@openwrt.org> | 2014-02-13 13:27:14 +0000 |
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committer | Imre Kaloz <kaloz@openwrt.org> | 2014-02-13 13:27:14 +0000 |
commit | af63cdf87ad76177fb7180e5fb57ec6f949fbb98 (patch) | |
tree | 3f3c2ff5babca3eacef366a9b794b0ea7e5f945e /target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch | |
parent | 83d9cec4911b6639c1c2f22cfb943df3e1252a1e (diff) | |
download | upstream-af63cdf87ad76177fb7180e5fb57ec6f949fbb98.tar.gz upstream-af63cdf87ad76177fb7180e5fb57ec6f949fbb98.tar.bz2 upstream-af63cdf87ad76177fb7180e5fb57ec6f949fbb98.zip |
upgrade 3.13 targets to 3.13.2, refresh patches
Signed-off-by: Imre Kaloz <kaloz@openwrt.org
SVN-Revision: 39582
Diffstat (limited to 'target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch')
-rw-r--r-- | target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch b/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch index a982d4cd18..6b63000e6a 100644 --- a/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch +++ b/target/linux/sunxi/patches-3.13/115-clk-sunxi_add-gating-pll1.patch @@ -17,11 +17,9 @@ Acked-by: Mike Turquette <mturquette@linaro.org> drivers/clk/sunxi/clk-sunxi.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) -diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt -index 91a748f..b8c6cc4 100644 --- a/Documentation/devicetree/bindings/clock/sunxi.txt +++ b/Documentation/devicetree/bindings/clock/sunxi.txt -@@ -7,7 +7,7 @@ This binding uses the common clock binding[1]. +@@ -7,7 +7,7 @@ This binding uses the common clock bindi Required properties: - compatible : shall be one of the following: "allwinner,sun4i-osc-clk" - for a gatable oscillator @@ -30,11 +28,9 @@ index 91a748f..b8c6cc4 100644 "allwinner,sun6i-a31-pll1-clk" - for the main PLL clock on A31 "allwinner,sun4i-cpu-clk" - for the CPU multiplexer clock "allwinner,sun4i-axi-clk" - for the AXI clock -diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c -index 25ebba8..52f34ec 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c -@@ -301,11 +301,13 @@ struct factors_data { +@@ -301,11 +301,13 @@ static struct clk_factors_config sun4i_a }; static const struct factors_data sun4i_pll1_data __initconst = { @@ -48,6 +44,3 @@ index 25ebba8..52f34ec 100644 .table = &sun6i_a31_pll1_config, .getter = sun6i_a31_get_pll1_factors, }; --- -1.8.5.1 - |