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authorMarkus Stockhausen <markus.stockhausen@gmx.de>2022-09-18 20:30:39 +0200
committerSander Vanheule <sander@svanheule.net>2022-09-18 20:38:56 +0200
commit3f41360eb70c775764408b6dd353d83fa6cab943 (patch)
tree03664a86191290d5737deb905ff692e65c858d5f /target/linux/realtek/patches-5.10
parentbcb5d6b21ba574db1d02385b494eb01fe46bf8aa (diff)
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realtek: use upstream recommendation for secondary CPU start
Currently we fix interrupts/timers for the secondary CPU by patching vsmp_init_secondary(). Get a little bit more generic and use the upstream recommended way instead. Additionally avoid a check around register_cps_smp_ops() because it does that itself. See https://lkml.org/lkml/2022/9/12/522 Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Diffstat (limited to 'target/linux/realtek/patches-5.10')
-rw-r--r--target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch21
1 files changed, 0 insertions, 21 deletions
diff --git a/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch b/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
index 6a0038d86b..2b9102633e 100644
--- a/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
+++ b/target/linux/realtek/patches-5.10/309-cevt-rtl9300-support.patch
@@ -31,24 +31,3 @@
#ifdef CONFIG_CEVT_R4K
return r4k_clockevent_init();
#else
---- a/arch/mips/kernel/smp-mt.c
-+++ b/arch/mips/kernel/smp-mt.c
-@@ -108,12 +108,18 @@ static void __init smvp_tc_init(unsigned
- static void vsmp_init_secondary(void)
- {
- /* This is Malta specific: IPI,performance and timer interrupts */
-+
-+ /* RTL9300 Clear internal timer interrupt */
-+ write_c0_compare(0);
-+
- if (mips_gic_present())
- change_c0_status(ST0_IM, STATUSF_IP2 | STATUSF_IP3 |
- STATUSF_IP4 | STATUSF_IP5 |
- STATUSF_IP6 | STATUSF_IP7);
- else
- change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
-+ STATUSF_IP2 | STATUSF_IP3 |
-+ STATUSF_IP4 | STATUSF_IP5 |
- STATUSF_IP6 | STATUSF_IP7);
- }
-