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author | John Crispin <john@phrozen.org> | 2020-11-26 12:02:21 +0100 |
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committer | John Crispin <john@phrozen.org> | 2020-11-26 13:29:27 +0100 |
commit | 2b88563ee5aafd9571d965b7f2093a0f58d98a31 (patch) | |
tree | d2997a6745fe0cffab8db73d4a735c3366a301b0 /target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c | |
parent | 4e39949dd1f7eb706d857e1c44a992ae752132a7 (diff) | |
download | upstream-2b88563ee5aafd9571d965b7f2093a0f58d98a31.tar.gz upstream-2b88563ee5aafd9571d965b7f2093a0f58d98a31.tar.bz2 upstream-2b88563ee5aafd9571d965b7f2093a0f58d98a31.zip |
realtek: update the tree to the latest refactored version
* rename the target to realtek
* add refactored DSA driver
* add latest gpio driver
* lots of arch cleanups
* new irq driver
* additional boards
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c')
-rw-r--r-- | target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c new file mode 100644 index 0000000000..de0af033f3 --- /dev/null +++ b/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/storm.c @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <asm/mach-rtl838x/mach-rtl83xx.h> +#include "rtl83xx.h" + + +static void rtl83xx_storm_enable(struct rtl838x_switch_priv *priv, int port, bool enable) +{ + // Enable Storm control for that port for UC, MC, and BC + if (enable) + sw_w32(0x7, RTL838X_STORM_CTRL_LB_CTRL(port)); + else + sw_w32(0x0, RTL838X_STORM_CTRL_LB_CTRL(port)); +} + +void __init rtl83xx_storm_control_init(struct rtl838x_switch_priv *priv) +{ + int i; + + pr_debug("Enabling Storm control\n"); + // TICK_PERIOD_PPS + if (priv->id == 0x8380) + sw_w32_mask(0x3ff << 20, 434 << 20, RTL838X_SCHED_LB_TICK_TKN_CTRL_0); + + // Set burst rate + sw_w32(0x00008000, RTL838X_STORM_CTRL_BURST_0); // UC + sw_w32(0x80008000, RTL838X_STORM_CTRL_BURST_1); // MC and BC + + // Set burst Packets per Second to 32 + sw_w32(0x00000020, RTL838X_STORM_CTRL_BURST_PPS_0); // UC + sw_w32(0x00200020, RTL838X_STORM_CTRL_BURST_PPS_1); // MC and BC + + // Include IFG in storm control + sw_w32_mask(0, BIT(6), RTL838X_STORM_CTRL); + // Rate control is based on bytes/s (0 = packets) + sw_w32_mask(0, BIT(5), RTL838X_STORM_CTRL); + // Bandwidth control includes preamble and IFG (10 Bytes) + sw_w32_mask(0, 1, RTL838X_SCHED_CTRL); + + // On SoCs except RTL8382M, set burst size of port egress + if (priv->id != 0x8382) + sw_w32_mask(0xffff, 0x800, RTL838X_SCHED_LB_THR); + + /* Enable storm control on all ports with a PHY and limit rates, + * for UC and MC for both known and unknown addresses */ + for (i = 0; i < priv->cpu_port; i++) { + if (priv->ports[i].phy) { + sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_UC(i)); + sw_w32(BIT(18) | 0x8000, RTL838X_STORM_CTRL_PORT_MC(i)); + sw_w32(0x000, RTL838X_STORM_CTRL_PORT_BC(i)); + rtl83xx_storm_enable(priv, i, true); + } + } + + // Attack prevention, enable all attack prevention measures + //sw_w32(0x1ffff, RTL838X_ATK_PRVNT_CTRL); + /* Attack prevention, drop (bit = 0) problematic packets on all ports. + * Setting bit = 1 means: trap to CPU + */ + //sw_w32(0, RTL838X_ATK_PRVNT_ACT); + // Enable attack prevention on all ports + //sw_w32(0x0fffffff, RTL838X_ATK_PRVNT_PORT_EN); +} + |