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author | Olliver Schinagl <oliver@schinagl.nl> | 2022-08-30 21:25:25 +0200 |
---|---|---|
committer | Sander Vanheule <sander@svanheule.net> | 2022-12-27 16:31:48 +0100 |
commit | 758c88b969639d0e6b684669d2e54dd1be3102f4 (patch) | |
tree | e7d26b19583851656d58903b8552daa4d4fe2077 /target/linux/realtek/files-5.15/arch | |
parent | 2c40359c5c12621fa386efca3139ea523db6d39f (diff) | |
download | upstream-758c88b969639d0e6b684669d2e54dd1be3102f4.tar.gz upstream-758c88b969639d0e6b684669d2e54dd1be3102f4.tar.bz2 upstream-758c88b969639d0e6b684669d2e54dd1be3102f4.zip |
realtek: Whitespace and codestyle cleanup
Fix some ugly whitepsaces and codestyle issues around the realtek sources.
While this is by no means perfect, it catches what it caught.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Diffstat (limited to 'target/linux/realtek/files-5.15/arch')
-rw-r--r-- | target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h | 4 | ||||
-rw-r--r-- | target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c | 6 |
2 files changed, 6 insertions, 4 deletions
diff --git a/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h index d95e5fb098..aa2d918efb 100644 --- a/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h +++ b/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h @@ -350,9 +350,7 @@ #define RTL931X_MAC_L2_GLOBAL_CTRL2 (0x1358) #define RTL931X_MAC_L2_GLOBAL_CTRL1 (0x5548) -/* - * Switch interrupts - */ +/* Switch interrupts */ #define RTL838X_IMR_GLB (0x1100) #define RTL838X_IMR_PORT_LINK_STS_CHG (0x1104) #define RTL838X_ISR_GLB_SRC (0x1148) diff --git a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c index 1c8c30de5d..447e754f20 100644 --- a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c +++ b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c @@ -11,7 +11,7 @@ #include <mach-rtl83xx.h> -/* +/* * Timer registers * the RTL9300/9310 SoCs have 6 timers, each register block 0x10 apart */ @@ -59,6 +59,7 @@ static irqreturn_t rtl9300_timer_interrupt(int irq, void *dev_id) writel(v, rtl_clk->base + RTL9300_TC_INT); clk->event_handler(clk); + return IRQ_HANDLED; } @@ -101,6 +102,7 @@ static int rtl9300_state_periodic(struct clock_event_device *clk) rtl9300_clock_stop(base); writel(RTL9300_CLOCK_RATE / HZ, base + RTL9300_TC_DATA); rtl9300_timer_start(base, TIMER_MODE_REPEAT); + return 0; } @@ -112,6 +114,7 @@ static int rtl9300_state_oneshot(struct clock_event_device *clk) rtl9300_clock_stop(base); writel(RTL9300_CLOCK_RATE / HZ, base + RTL9300_TC_DATA); rtl9300_timer_start(base, TIMER_MODE_ONCE); + return 0; } @@ -121,6 +124,7 @@ static int rtl9300_shutdown(struct clock_event_device *clk) pr_debug("------------- rtl9300_shutdown %08x\n", (u32)base); rtl9300_clock_stop(base); + return 0; } |