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| author | Olliver Schinagl <oliver@schinagl.nl> | 2022-12-22 11:27:59 +0100 |
|---|---|---|
| committer | Sander Vanheule <sander@svanheule.net> | 2022-12-27 16:33:01 +0100 |
| commit | 0a931767cf2a4c2592bb37c1109299a56fb0ee89 (patch) | |
| tree | a07c91db89eb128d91199d7f661dab29d7909c69 /target/linux/realtek/files-5.15/arch | |
| parent | 758c88b969639d0e6b684669d2e54dd1be3102f4 (diff) | |
| download | upstream-0a931767cf2a4c2592bb37c1109299a56fb0ee89.tar.gz upstream-0a931767cf2a4c2592bb37c1109299a56fb0ee89.tar.bz2 upstream-0a931767cf2a4c2592bb37c1109299a56fb0ee89.zip | |
realtek: Replace C++ style comments
The only exception to C++ style comments are SPDX license identifier
markers at the start of C files (even headers have C style markers).
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Diffstat (limited to 'target/linux/realtek/files-5.15/arch')
| -rw-r--r-- | target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h | 2 | ||||
| -rw-r--r-- | target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c | 14 |
2 files changed, 8 insertions, 8 deletions
diff --git a/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h index aa2d918efb..d9c0b311ae 100644 --- a/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h +++ b/target/linux/realtek/files-5.15/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h @@ -366,7 +366,7 @@ #define RTL930X_ISR_GLB (0xC658) #define RTL930X_ISR_PORT_LINK_STS_CHG (0xC660) -// IMR_GLB does not exit on RTL931X +/* IMR_GLB does not exit on RTL931X */ #define RTL931X_IMR_PORT_LINK_STS_CHG (0x126C) #define RTL931X_ISR_GLB_SRC (0x12B4) #define RTL931X_ISR_PORT_LINK_STS_CHG (0x12B8) diff --git a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c index 447e754f20..1f7698d314 100644 --- a/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c +++ b/target/linux/realtek/files-5.15/arch/mips/kernel/cevt-rtl9300.c @@ -24,11 +24,11 @@ #define RTL9300_TC_INT_IP BIT(16) #define RTL9300_TC_INT_IE BIT(20) -// Timer modes +/* Timer modes */ #define TIMER_MODE_REPEAT 1 #define TIMER_MODE_ONCE 0 -// Minimum divider is 2 +/* Minimum divider is 2 */ #define DIVISOR_RTL9300 2 #define N_BITS 28 @@ -54,7 +54,7 @@ static irqreturn_t rtl9300_timer_interrupt(int irq, void *dev_id) u32 v = readl(rtl_clk->base + RTL9300_TC_INT); - // Acknowledge the IRQ + /* Acknowledge the IRQ */ v |= RTL9300_TC_INT_IP; writel(v, rtl_clk->base + RTL9300_TC_INT); @@ -69,7 +69,7 @@ static void rtl9300_clock_stop(void __iomem *base) writel(0, base + RTL9300_TC_CTRL); - // Acknowledge possibly pending IRQ + /* Acknowledge possibly pending IRQ */ v = readl(base + RTL9300_TC_INT); writel(v | RTL9300_TC_INT_IP, base + RTL9300_TC_INT); } @@ -132,14 +132,14 @@ static void rtl9300_clock_setup(void __iomem *base) { u32 v; - // Disable timer + /* Disable timer */ writel(0, base + RTL9300_TC_CTRL); - // Acknowledge possibly pending IRQ + /* Acknowledge possibly pending IRQ */ v = readl(base + RTL9300_TC_INT); writel(v | RTL9300_TC_INT_IP, base + RTL9300_TC_INT); - // Setup maximum period (for use as clock-source) + /* Setup maximum period (for use as clock-source) */ writel(0x0fffffff, base + RTL9300_TC_DATA); } |