diff options
author | Birger Koblitz <git@birger-koblitz.de> | 2022-01-17 13:21:09 +0100 |
---|---|---|
committer | Daniel Golle <daniel@makrotopia.org> | 2022-02-17 15:21:47 +0000 |
commit | 7026084066fb6e2a7c40a4620f0fb6182b68c5cb (patch) | |
tree | 083254900250211138804c984886ca02c9eafff6 /target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx | |
parent | 51c8f766124487f6e84076c272645e5f29d32f5e (diff) | |
download | upstream-7026084066fb6e2a7c40a4620f0fb6182b68c5cb.tar.gz upstream-7026084066fb6e2a7c40a4620f0fb6182b68c5cb.tar.bz2 upstream-7026084066fb6e2a7c40a4620f0fb6182b68c5cb.zip |
realtek: Add SDS configuration routines for the RTL93XX platforms
Adds configuration routines for the internal SerDes of the
RTL930X and RTL931X.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx')
-rw-r--r-- | target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c index 8afb503b23..345b94bcdc 100644 --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/dsa.c @@ -345,6 +345,7 @@ static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port, state->interface != PHY_INTERFACE_MODE_QSGMII && state->interface != PHY_INTERFACE_MODE_XGMII && state->interface != PHY_INTERFACE_MODE_HSGMII && + state->interface != PHY_INTERFACE_MODE_10GBASER && state->interface != PHY_INTERFACE_MODE_10GKR && state->interface != PHY_INTERFACE_MODE_USXGMII && state->interface != PHY_INTERFACE_MODE_INTERNAL && @@ -390,6 +391,9 @@ static void rtl93xx_phylink_validate(struct dsa_switch *ds, int port, phylink_set(mask, 10000baseCR_Full); } + if (state->interface == PHY_INTERFACE_MODE_USXGMII) + phylink_set(mask, 10000baseT_Full); + phylink_set(mask, 10baseT_Half); phylink_set(mask, 10baseT_Full); phylink_set(mask, 100baseT_Half); @@ -736,9 +740,6 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port, if (priv->family_id == RTL9310_FAMILY_ID) return rtl931x_phylink_mac_config(ds, port, mode, state); - reg = sw_r32(priv->r->mac_force_mode_ctrl(port)); - reg &= ~(0xf << 3); - sds_num = priv->ports[port].sds_num; pr_info("%s SDS is %d\n", __func__, sds_num); if (sds_num >= 0) { @@ -747,15 +748,14 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port, sds_mode = 0x12; break; case PHY_INTERFACE_MODE_1000BASEX: - sds_mode = 0x1b; // 10G 1000X Auto + sds_mode = 0x04; break; case PHY_INTERFACE_MODE_XGMII: sds_mode = 0x10; break; + case PHY_INTERFACE_MODE_10GBASER: case PHY_INTERFACE_MODE_10GKR: - sds_mode = 0x1a; - // We need to use media sel for fibre media: - reg |= BIT(16); + sds_mode = 0x1b; // 10G 1000X Auto break; case PHY_INTERFACE_MODE_USXGMII: sds_mode = 0x0d; @@ -768,6 +768,9 @@ static void rtl93xx_phylink_mac_config(struct dsa_switch *ds, int port, rtl9300_sds_rst(sds_num, sds_mode); } + reg = sw_r32(priv->r->mac_force_mode_ctrl(port)); + reg &= ~(0xf << 3); + switch (state->speed) { case SPEED_10000: reg |= 4 << 3; @@ -805,8 +808,17 @@ static void rtl83xx_phylink_mac_link_down(struct dsa_switch *ds, int port, phy_interface_t interface) { struct rtl838x_switch_priv *priv = ds->priv; + u32 v; + /* Stop TX/RX to port */ sw_w32_mask(0x3, 0, priv->r->mac_port_ctrl(port)); + + // No longer force link + if (priv->family_id == RTL9300_FAMILY_ID) + v = RTL930X_FORCE_EN | RTL930X_FORCE_LINK_EN; + else if (priv->family_id == RTL9310_FAMILY_ID) + v = RTL931X_FORCE_EN | RTL931X_FORCE_LINK_EN; + sw_w32_mask(v, 0, priv->r->mac_port_ctrl(port)); } static void rtl93xx_phylink_mac_link_down(struct dsa_switch *ds, int port, |