diff options
author | Birger Koblitz <git@birger-koblitz.de> | 2022-01-18 17:20:30 +0100 |
---|---|---|
committer | Daniel Golle <daniel@makrotopia.org> | 2022-02-17 15:21:47 +0000 |
commit | f3c5e7ddcc365f66f9b21f3332a95d281a101303 (patch) | |
tree | 22a3488d52b808e4deda489a3efc42844b7b69c8 /target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c | |
parent | afa3ab54c03d5126b14651f367b38165fab5b3cc (diff) | |
download | upstream-f3c5e7ddcc365f66f9b21f3332a95d281a101303.tar.gz upstream-f3c5e7ddcc365f66f9b21f3332a95d281a101303.tar.bz2 upstream-f3c5e7ddcc365f66f9b21f3332a95d281a101303.zip |
realted: Add DSA bridge offload configuration
Add functionality to enable or disable L2 learning offload and port flooding
for RTL83XX.
Signed-off-by: Sebastian Gottschall <s.gottschall@dd-wrt.com>
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c')
-rw-r--r-- | target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c index 0d1f3e0382..8ae174bd9e 100644 --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/rtl839x.c @@ -558,6 +558,47 @@ static void rtl839x_l2_learning_setup(void) sw_w32(0, RTL839X_SPCL_TRAP_ARP_CTRL); } +static void rtl839x_enable_learning(int port, bool enable) +{ + // Limit learning to maximum: 32k entries, after that just flood (bits 0-1) + + if (enable) { + // flood after 32k entries + sw_w32((0x7fff << 2) | 0, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2)); + } else { + // just forward + sw_w32(0, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2)); + } + +} + +static void rtl839x_enable_flood(int port, bool enable) +{ + u32 flood_mask = sw_r32(RTL839X_L2_PORT_LRN_CONSTRT + (port << 2)); + + if (enable) { + // flood + flood_mask &= ~3; + flood_mask |= 0; + sw_w32(flood_mask, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2)); + } else { + // drop (bit 1) + flood_mask &= ~3; + flood_mask |= 1; + sw_w32(flood_mask, RTL839X_L2_PORT_LRN_CONSTRT + (port << 2)); + } + +} + +static void rtl839x_enable_mcast_flood(int port, bool enable) +{ + +} + +static void rtl839x_enable_bcast_flood(int port, bool enable) +{ + +} irqreturn_t rtl839x_switch_irq(int irq, void *dev_id) { struct dsa_switch *ds = dev_id; @@ -1777,6 +1818,10 @@ const struct rtl838x_reg rtl839x_reg = { .vlan_port_pvid_set = rtl839x_vlan_port_pvid_set, .set_vlan_igr_filter = rtl839x_set_igr_filter, .set_vlan_egr_filter = rtl839x_set_egr_filter, + .enable_learning = rtl839x_enable_learning, + .enable_flood = rtl839x_enable_flood, + .enable_mcast_flood = rtl839x_enable_mcast_flood, + .enable_bcast_flood = rtl839x_enable_bcast_flood, .stp_get = rtl839x_stp_get, .stp_set = rtl839x_stp_set, .mac_force_mode_ctrl = rtl839x_mac_force_mode_ctrl, |