diff options
| author | Birger Koblitz <git@birger-koblitz.de> | 2022-01-01 14:10:20 +0100 |
|---|---|---|
| committer | Daniel Golle <daniel@makrotopia.org> | 2022-02-17 15:21:47 +0000 |
| commit | 6378d72ef6f548bdb8fc0e636fdb5fbecc869f34 (patch) | |
| tree | 2b179ff305b59a399a7b042cd014e67f4aed5d7e /target/linux/realtek/files-5.10/arch | |
| parent | 90242020529cef66c4ceccd56396b669ea4ad818 (diff) | |
| download | upstream-6378d72ef6f548bdb8fc0e636fdb5fbecc869f34.tar.gz upstream-6378d72ef6f548bdb8fc0e636fdb5fbecc869f34.tar.bz2 upstream-6378d72ef6f548bdb8fc0e636fdb5fbecc869f34.zip | |
realtek: Fix RTL931X-specific Ethernet driver functions
Fix the update counter of the RX ring, add SDS access functions
for RTL931X.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux/realtek/files-5.10/arch')
| -rw-r--r-- | target/linux/realtek/files-5.10/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/target/linux/realtek/files-5.10/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h b/target/linux/realtek/files-5.10/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h index ecec0fec2d..2d634b2fd3 100644 --- a/target/linux/realtek/files-5.10/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h +++ b/target/linux/realtek/files-5.10/arch/mips/include/asm/mach-rtl838x/mach-rtl83xx.h @@ -337,30 +337,17 @@ #define RTL931X_SMI_GLB_CTRL1 (0x0CBC) #define RTL931X_SMI_GLB_CTRL0 (0x0CC0) #define RTL931X_SMI_PORT_POLLING_CTRL (0x0CCC) +#define RTL931X_SMI_PORT_ADDR (0x0C74) +#define RTL931X_SMI_PORT_POLLING_SEL (0x0C9C) +#define RTL9310_SMI_PORT_POLLING_CTRL (0x0CCC) #define RTL931X_SMI_INDRT_ACCESS_CTRL_0 (0x0C00) #define RTL931X_SMI_INDRT_ACCESS_CTRL_1 (0x0C04) #define RTL931X_SMI_INDRT_ACCESS_CTRL_2 (0x0C08) #define RTL931X_SMI_INDRT_ACCESS_CTRL_3 (0x0C10) #define RTL931X_SMI_INDRT_ACCESS_BC_PHYID_CTRL (0x0C14) #define RTL931X_SMI_INDRT_ACCESS_MMD_CTRL (0xC18) - -#define RTL930X_SMI_GLB_CTRL (0xCA00) -#define RTL930X_SMI_POLL_CTRL (0xca90) -#define RTL930X_SMI_PORT0_15_POLLING_SEL (0xCA08) -#define RTL930X_SMI_PORT16_27_POLLING_SEL (0xCA0C) -#define RTL930X_SMI_PORT0_5_ADDR (0xCB80) -#define RTL930X_SMI_ACCESS_PHY_CTRL_0 (0xCB70) -#define RTL930X_SMI_ACCESS_PHY_CTRL_1 (0xCB74) -#define RTL930X_SMI_ACCESS_PHY_CTRL_2 (0xCB78) -#define RTL930X_SMI_ACCESS_PHY_CTRL_3 (0xCB7C) - -#define RTL931X_SMI_GLB_CTRL1 (0x0CBC) -#define RTL931X_SMI_GLB_CTRL0 (0x0CC0) -#define RTL931X_SMI_PORT_POLLING_CTRL (0x0CCC) -#define RTL931X_SMI_INDRT_ACCESS_CTRL_0 (0x0C00) -#define RTL931X_SMI_INDRT_ACCESS_CTRL_1 (0x0C04) -#define RTL931X_SMI_INDRT_ACCESS_CTRL_2 (0x0C08) -#define RTL931X_SMI_INDRT_ACCESS_CTRL_3 (0x0C10) +#define RTL931X_MAC_L2_GLOBAL_CTRL2 (0x1358) +#define RTL931X_MAC_L2_GLOBAL_CTRL1 (0x5548) /* * Switch interrupts @@ -395,6 +382,9 @@ #define RTL9300_FAMILY_ID (0x9300) #define RTL9310_FAMILY_ID (0x9310) +/* SPI Support */ +#define RTL931X_SPI_CTRL0 (0x103C) + /* Basic SoC Features */ #define RTL838X_CPU_PORT 28 #define RTL839X_CPU_PORT 52 |