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| author | INAGAKI Hiroshi <musashino.open@gmail.com> | 2022-09-09 22:08:16 +0900 |
|---|---|---|
| committer | Sander Vanheule <sander@svanheule.net> | 2022-12-15 20:52:09 +0100 |
| commit | 8fb15ea52a02b0578c11897afd1a87f8502d8f52 (patch) | |
| tree | a65ae72710e84420cad6e500a2b781abce0cd9a0 /target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts | |
| parent | fef55d5ffd31bd6e0d157df784f47fe8ce0f1494 (diff) | |
| download | upstream-8fb15ea52a02b0578c11897afd1a87f8502d8f52.tar.gz upstream-8fb15ea52a02b0578c11897afd1a87f8502d8f52.tar.bz2 upstream-8fb15ea52a02b0578c11897afd1a87f8502d8f52.zip | |
realtek: copy dts/files/patches/configs for 5.15
Copy dts/files/patches/configs from 5.10 to 5.15.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
[refresh with updated DGS-1210 dts files]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Diffstat (limited to 'target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts')
| -rw-r--r-- | target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts | 113 |
1 files changed, 113 insertions, 0 deletions
diff --git a/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts new file mode 100644 index 0000000000..b51c75f355 --- /dev/null +++ b/target/linux/realtek/dts-5.15/rtl8380_hpe_1920-8g.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "rtl838x.dtsi" +#include "rtl838x_hpe_1920.dtsi" + +/ { + compatible = "hpe,1920-8g", "realtek,rtl838x-soc"; + model = "HPE 1920-8G (JG920A)"; + + gpio1: rtl8231-gpio { + compatible = "realtek,rtl8231-gpio"; + #gpio-cells = <2>; + gpio-controller; + indirect-access-bus-id = <0>; + }; + + i2c0: i2c-gpio-0 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp0: sfp-0 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>; + // tx-fault and tx-disable unconnected + }; + + i2c1: i2c-gpio-1 { + compatible = "i2c-gpio"; + sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <2>; + #address-cells = <1>; + #size-cells = <0>; + }; + + sfp1: sfp-1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>; + // tx-fault and tx-disable unconnected + }; +}; + +ðernet0 { + mdio: mdio-bus { + compatible = "realtek,rtl838x-mdio"; + regmap = <ðernet0>; + #address-cells = <1>; + #size-cells = <0>; + + INTERNAL_PHY(8) + INTERNAL_PHY(9) + INTERNAL_PHY(10) + INTERNAL_PHY(11) + INTERNAL_PHY(12) + INTERNAL_PHY(13) + INTERNAL_PHY(14) + INTERNAL_PHY(15) + + INTERNAL_PHY(24) + INTERNAL_PHY(26) + }; +}; + +&switch0 { + ports { + #address-cells = <1>; + #size-cells = <0>; + + SWITCH_PORT(8, 1, internal) + SWITCH_PORT(9, 2, internal) + SWITCH_PORT(10, 3, internal) + SWITCH_PORT(11, 4, internal) + SWITCH_PORT(12, 5, internal) + SWITCH_PORT(13, 6, internal) + SWITCH_PORT(14, 7, internal) + SWITCH_PORT(15, 8, internal) + + port@24 { + reg = <24>; + label = "lan9"; + phy-mode = "1000base-x"; + managed = "in-band-status"; + sfp = <&sfp0>; + }; + + port@26 { + reg = <26>; + label = "lan10"; + phy-mode = "1000base-x"; + managed = "in-band-status"; + sfp = <&sfp1>; + }; + + port@28 { + ethernet = <ðernet0>; + reg = <28>; + phy-mode = "internal"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; +}; |