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authorBirger Koblitz <git@birger-koblitz.de>2021-12-31 12:18:05 +0100
committerDaniel Golle <daniel@makrotopia.org>2022-02-17 15:21:47 +0000
commit0a7565e53653f3e5a3448ef892b414187b8abba2 (patch)
tree6e396390d6337140ff25afde6f7260e1c6b04783 /target/linux/realtek/dts-5.10
parent1df2f8d83107486d0a759dce734a59852705078c (diff)
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realtek: Update rtl839x.dtsi for realtek,rtl-intc, new gpio controller remove RTL8231 node
Update the IRQ configuration to work with the new rtl-intc controller. Also change all KSEG1 addresses in reg = <> of the devics to physical addresses. Use the new gpio-otto controller instead of the legacy driver. Also remove the memory node as this is better put into a device .dts. Also remove the RTL8231 GPIO controller node from this base file since the chip might not be found in all Realtek RTL839x devices. Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Diffstat (limited to 'target/linux/realtek/dts-5.10')
-rw-r--r--target/linux/realtek/dts-5.10/rtl839x.dtsi225
1 files changed, 225 insertions, 0 deletions
diff --git a/target/linux/realtek/dts-5.10/rtl839x.dtsi b/target/linux/realtek/dts-5.10/rtl839x.dtsi
new file mode 100644
index 0000000000..19da1c11cb
--- /dev/null
+++ b/target/linux/realtek/dts-5.10/rtl839x.dtsi
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#define STRINGIZE(s) #s
+#define LAN_LABEL(p, s) STRINGIZE(p ## s)
+#define SWITCH_PORT_LABEL(n) LAN_LABEL(lan, n)
+
+#define INTERNAL_PHY(n) \
+ phy##n: ethernet-phy@##n { \
+ reg = <##n>; \
+ compatible = "ethernet-phy-ieee802.3-c22"; \
+ phy-is-integrated; \
+ };
+
+#define EXTERNAL_PHY(n) \
+ phy##n: ethernet-phy@##n { \
+ reg = <##n>; \
+ compatible = "ethernet-phy-ieee802.3-c22"; \
+ };
+
+#define EXTERNAL_SFP_PHY(n) \
+ phy##n: ethernet-phy@##n { \
+ compatible = "ethernet-phy-ieee802.3-c22"; \
+ sfp; \
+ media = "fibre"; \
+ reg = <##n>; \
+ };
+
+#define SWITCH_PORT(n, s, m) \
+ port@##n { \
+ reg = <##n>; \
+ label = SWITCH_PORT_LABEL(s) ; \
+ phy-handle = <&phy##n>; \
+ phy-mode = #m ; \
+ };
+
+#define SWITCH_SFP_PORT(n, s, m) \
+ port@##n { \
+ reg = <##n>; \
+ label = SWITCH_PORT_LABEL(s) ; \
+ phy-handle = <&phy##n>; \
+ phy-mode = #m ; \
+ fixed-link { \
+ speed = <1000>; \
+ full-duplex; \
+ }; \
+ };
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ compatible = "realtek,rtl839x-soc";
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ frequency = <700000000>;
+
+ cpu@0 {
+ compatible = "mips,mips34Kc";
+ reg = <0>;
+ };
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,38400";
+ };
+
+ lx_clk: lx_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+
+ cpuintc: cpuintc {
+ compatible = "mti,cpu-interrupt-controller";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x18000000 0x10000>;
+
+ intc: interrupt-controller@3000 {
+ compatible = "realtek,rtl8390-intc", "realtek,rtl-intc";
+ reg = <0x3000 0x18>, <0x3018 0x18>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>, <3>, <4>, <5>, <6>;
+ };
+
+ spi0: spi@1200 {
+ compatible = "realtek,rtl8380-spi";
+ reg = <0x1200 0x100>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ uart0: uart@2000 {
+ compatible = "ns16550a";
+ reg = <0x2000 0x100>;
+
+ clocks = <&lx_clk>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <31 1>;
+
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
+ };
+
+ uart1: uart@2100 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&enable_uart1>;
+
+ compatible = "ns16550a";
+ reg = <0x2100 0x100>;
+
+ clocks = <&lx_clk>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <30 2>;
+
+ reg-io-width = <1>;
+ reg-shift = <2>;
+ fifo-size = <1>;
+ no-loopback-test;
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@b3500 {
+ compatible = "realtek,rtl8390-gpio", "realtek,otto-gpio";
+ reg = <0x3500 0x20>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <24>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupt-parent = <&intc>;
+ interrupts = <23 2>;
+ };
+
+ watchdog0: watchdog@3150 {
+ compatible = "realtek,rtl8390-wdt";
+ reg = <0x3150 0xc>;
+
+ realtek,reset-mode = "soc";
+
+ clocks = <&lx_clk>;
+ timeout-sec = <30>;
+
+ interrupt-parent = <&intc>;
+ interrupt-names = "phase1", "phase2";
+ interrupts = <19 4>, <18 4>;
+ };
+
+ };
+
+ pinmux: pinmux@1b001000 {
+ compatible = "pinctrl-single";
+ reg = <0x1b000004 0x4>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ enable_uart1: pinmux_enable_uart1 {
+ pinctrl-single,bits = <0x0 0x1 0x3>;
+ };
+ };
+
+ /* LED_GLB_CTRL */
+ pinmux_led: pinmux@1b00a000 {
+ compatible = "pinctrl-single";
+ reg = <0x1b0000e4 0x4>;
+
+ pinctrl-single,bit-per-mux;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x1>;
+ #pinctrl-cells = <2>;
+
+ /* enable GPIO 0 */
+ pinmux_disable_sys_led: disable_sys_led {
+ pinctrl-single,bits = <0x0 0x0 0x4000>;
+ };
+ };
+
+ ethernet0: ethernet@1b00a300 {
+ compatible = "realtek,rtl838x-eth";
+ reg = <0x1b00a300 0x100>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <24 3>;
+
+ phy-mode = "internal";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ switch0: switch@1b000000 {
+ status = "okay";
+ compatible = "realtek,rtl83xx-switch";
+
+ interrupt-parent = <&intc>;
+ interrupts = <20 2>;
+ };
+};