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authorFlorian Fainelli <florian@openwrt.org>2010-08-31 14:10:25 +0000
committerFlorian Fainelli <florian@openwrt.org>2010-08-31 14:10:25 +0000
commit403d40afbe4a3b69782ee79e96850cd670db3441 (patch)
treebaa0d2e3632cd12309fe7c886276aec90111602d /target/linux/rdc
parentc62dbceb0e9e14ce10e3454a3c18ce384dff7b34 (diff)
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[rdc] backport upstream multicast fix (#7848)
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22852 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/rdc')
-rw-r--r--target/linux/rdc/patches-2.6.32/015-r6040_fix_multicast.patch35
1 files changed, 35 insertions, 0 deletions
diff --git a/target/linux/rdc/patches-2.6.32/015-r6040_fix_multicast.patch b/target/linux/rdc/patches-2.6.32/015-r6040_fix_multicast.patch
new file mode 100644
index 0000000000..f41b4b5423
--- /dev/null
+++ b/target/linux/rdc/patches-2.6.32/015-r6040_fix_multicast.patch
@@ -0,0 +1,35 @@
+---
+--- a/drivers/net/r6040.c
++++ b/drivers/net/r6040.c
+@@ -136,7 +136,7 @@
+ #define RX_DESC_SIZE (RX_DCNT * sizeof(struct r6040_descriptor))
+ #define TX_DESC_SIZE (TX_DCNT * sizeof(struct r6040_descriptor))
+ #define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */
+-#define MCAST_MAX 4 /* Max number multicast addresses to filter */
++#define MCAST_MAX 3 /* Max number multicast addresses to filter */
+
+ /* Descriptor status */
+ #define DSC_OWNER_MAC 0x8000 /* MAC is the owner of this descriptor */
+@@ -887,9 +887,6 @@ static void r6040_multicast_list(struct
+ crc >>= 26;
+ hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf));
+ }
+- /* Write the index of the hash table */
+- for (i = 0; i < 4; i++)
+- iowrite16(hash_table[i] << 14, ioaddr + MCR1);
+ /* Fill the MAC hash tables with their values */
+ iowrite16(hash_table[0], ioaddr + MAR0);
+ iowrite16(hash_table[1], ioaddr + MAR1);
+@@ -905,9 +902,9 @@ static void r6040_multicast_list(struct
+ dmi = dmi->next;
+ }
+ for (i = dev->mc_count; i < MCAST_MAX; i++) {
+- iowrite16(0xffff, ioaddr + MID_0L + 8*i);
+- iowrite16(0xffff, ioaddr + MID_0M + 8*i);
+- iowrite16(0xffff, ioaddr + MID_0H + 8*i);
++ iowrite16(0xffff, ioaddr + MID_1L + 8 * i);
++ iowrite16(0xffff, ioaddr + MID_1M + 8 * i);
++ iowrite16(0xffff, ioaddr + MID_1H + 8 * i);
+ }
+ }
+