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| author | Alban Bedel <albeu@free.fr> | 2022-04-30 10:42:33 +0200 |
|---|---|---|
| committer | Chuanhong Guo <gch981213@gmail.com> | 2022-05-01 11:21:23 +0800 |
| commit | f953a1a4bfba2fa70c12bb80938aa66481a673b6 (patch) | |
| tree | 18ceb33c1e93110338b5b44590aa0285031dd130 /target/linux/ramips | |
| parent | ab4eafbed974c6ead13b11a50b3032670c26540a (diff) | |
| download | upstream-f953a1a4bfba2fa70c12bb80938aa66481a673b6.tar.gz upstream-f953a1a4bfba2fa70c12bb80938aa66481a673b6.tar.bz2 upstream-f953a1a4bfba2fa70c12bb80938aa66481a673b6.zip | |
ramips: zbt-wg2626: Add the reset gpio for PCIe port 1
The 2.4GHz interface doesn't come up properly with the log showing:
mt7621-pci 1e140000.pcie: pcie1 no card, disable it (RST & CLK)
As seen on other MT7621 boards this is caused by a missing reset GPIO.
The MT7621 dtsi set GPIO 19 as PCIe reset GPIO, which on this board
reset the 5GHz interface on port 0. Add GPIO 8 to the PCIe reset GPIO
list to also reset the 2.4GHz interface on port 1.
Signed-off-by: Alban Bedel <albeu@free.fr>
Diffstat (limited to 'target/linux/ramips')
| -rw-r--r-- | target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts index a1d6af9466..da22dc3797 100644 --- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts +++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg2626.dts @@ -88,6 +88,9 @@ &pcie { status = "okay"; + + reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>, + <&gpio 8 GPIO_ACTIVE_LOW>; }; &pcie0 { |