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| author | John Crispin <john@openwrt.org> | 2015-12-17 09:26:28 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-12-17 09:26:28 +0000 |
| commit | e8890c6be0f2987625644bb731c496da2a483113 (patch) | |
| tree | c49fb01ea8938684c7e83111844a667a49542863 /target/linux/ramips | |
| parent | b4bb10b3a0e12c123982391f7d38001aa63deee9 (diff) | |
| download | upstream-e8890c6be0f2987625644bb731c496da2a483113.tar.gz upstream-e8890c6be0f2987625644bb731c496da2a483113.tar.bz2 upstream-e8890c6be0f2987625644bb731c496da2a483113.zip | |
ramips: mt7621: add patch to setup CM memory region for palmbus
This is tested and works on ubnt-erx.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
SVN-Revision: 47903
Diffstat (limited to 'target/linux/ramips')
| -rw-r--r-- | target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch b/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch new file mode 100644 index 0000000000..ba462bf92e --- /dev/null +++ b/target/linux/ramips/patches-4.3/0060-mt7621-set-up-palmbus-memory-region.patch @@ -0,0 +1,36 @@ +--- a/arch/mips/include/asm/mach-ralink/mt7621.h ++++ b/arch/mips/include/asm/mach-ralink/mt7621.h +@@ -13,6 +13,9 @@ + #ifndef _MT7621_REGS_H_ + #define _MT7621_REGS_H_ + ++#define MT7621_PALMBUS_BASE 0x1C000000 ++#define MT7621_PALMBUS_SIZE 0x03FFFFFF ++ + #define MT7621_SYSC_BASE 0x1E000000 + + #define SYSC_REG_CHIP_NAME0 0x00 +--- a/arch/mips/ralink/mt7621.c ++++ b/arch/mips/ralink/mt7621.c +@@ -204,6 +204,21 @@ void prom_soc_init(struct ralink_soc_inf + mips_cm_probe(); + mips_cpc_probe(); + ++ if (mips_cm_numiocu()) { ++ /* mips_cm_probe() wipes out bootloader ++ config for CM regions and we have to configure them ++ again. This SoC cannot talk to pamlbus devices ++ witout proper iocu region set up. ++ ++ FIXME: it would be better to do this with values ++ from DT, but we need this very early because ++ without this we cannot talk to pretty much anything ++ including serial. ++ */ ++ write_gcr_reg0_base(MT7621_PALMBUS_BASE); ++ write_gcr_reg0_mask(~MT7621_PALMBUS_SIZE | CM_GCR_REGn_MASK_CMTGT_IOCU0); ++ } ++ + if (!register_cps_smp_ops()) + return; + if (!register_cmp_smp_ops()) |