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| author | Felix Fietkau <nbd@nbd.name> | 2018-02-21 13:54:35 +0100 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2018-02-21 14:46:45 +0100 |
| commit | 04052051405c2835aecf9c4d539bc6ed4e05878d (patch) | |
| tree | a7644734299d15da5785a5d9ce00d464f457729c /target/linux/ramips | |
| parent | 79f9cadd00d84860a4a41ec1ec1b277a2d94edea (diff) | |
| download | upstream-04052051405c2835aecf9c4d539bc6ed4e05878d.tar.gz upstream-04052051405c2835aecf9c4d539bc6ed4e05878d.tar.bz2 upstream-04052051405c2835aecf9c4d539bc6ed4e05878d.zip | |
kernel: fix MIPS GIC clock source counter width (affects MT7621)
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/ramips')
0 files changed, 0 insertions, 0 deletions