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authorIlya Lipnitskiy <ilya.lipnitskiy@gmail.com>2021-02-27 23:17:47 -0800
committerAdrian Schmutzler <freifunk@adrianschmutzler.de>2021-03-06 11:24:12 +0100
commitb021642cacd1b88836e5906bb2d3397b1de16da9 (patch)
treef6dbd004ac3bc4760c2559a8ebdf8c1a13b9e7af /target/linux/ramips/rt3883
parent10267e17299806f9885d086147878f6c492cb904 (diff)
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ramips: 5.10: refresh configs
Run-tested on Ubiquiti EdgeRouter X. Compile tested on all other subtargets. Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Diffstat (limited to 'target/linux/ramips/rt3883')
-rw-r--r--target/linux/ramips/rt3883/config-5.109
1 files changed, 4 insertions, 5 deletions
diff --git a/target/linux/ramips/rt3883/config-5.10 b/target/linux/ramips/rt3883/config-5.10
index 0fa542f7d8..65b7be7ea4 100644
--- a/target/linux/ramips/rt3883/config-5.10
+++ b/target/linux/ramips/rt3883/config-5.10
@@ -1,6 +1,5 @@
CONFIG_AR8216_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
@@ -14,11 +13,10 @@ CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
-CONFIG_CPU_HAS_LOAD_STORE_LR=y
+CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
@@ -33,12 +31,10 @@ CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_PINCTRL=y
CONFIG_DMA_NONCOHERENT=y
-CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
# CONFIG_DTB_RT3883_EVAL is not set
CONFIG_DTB_RT_NONE=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
-CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ATOMIC64=y
@@ -78,7 +74,9 @@ CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_INTC=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
+# CONFIG_KERNEL_ZSTD is not set
CONFIG_LIBFDT=y
+CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
@@ -96,6 +94,7 @@ CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
+CONFIG_MIPS_LD_CAN_LINK_VDSO=y
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y