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authorFelix Fietkau <nbd@nbd.name>2018-04-06 18:20:46 +0200
committerFelix Fietkau <nbd@nbd.name>2018-04-06 18:21:45 +0200
commitdea9922acd290b37a784d354892a44684a8fb696 (patch)
tree6882d6c6a6b0166ed11842edea35ace83c7e592d /target/linux/ramips/patches-4.9/101-mt7621-timer.patch
parent804952e7ef045e2ed68a1434dbc7371057495968 (diff)
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ramips: drop linux 4.9 support
4.14 has been tested a lot by a number of users, and we want to use it for the release. Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'target/linux/ramips/patches-4.9/101-mt7621-timer.patch')
-rw-r--r--target/linux/ramips/patches-4.9/101-mt7621-timer.patch98
1 files changed, 0 insertions, 98 deletions
diff --git a/target/linux/ramips/patches-4.9/101-mt7621-timer.patch b/target/linux/ramips/patches-4.9/101-mt7621-timer.patch
deleted file mode 100644
index 552716a21d..0000000000
--- a/target/linux/ramips/patches-4.9/101-mt7621-timer.patch
+++ /dev/null
@@ -1,98 +0,0 @@
---- a/arch/mips/ralink/mt7621.c
-+++ b/arch/mips/ralink/mt7621.c
-@@ -18,6 +18,7 @@
- #include <asm/mach-ralink/ralink_regs.h>
- #include <asm/mach-ralink/mt7621.h>
- #include <asm/mips-boards/launch.h>
-+#include <asm/delay.h>
-
- #include <pinmux.h>
-
-@@ -179,6 +180,58 @@ bool plat_cpu_core_present(int core)
- return true;
- }
-
-+#define LPS_PREC 8
-+/*
-+* Re-calibration lpj(loop-per-jiffy).
-+* (derived from kernel/calibrate.c)
-+*/
-+static int udelay_recal(void)
-+{
-+ unsigned int i, lpj = 0;
-+ unsigned long ticks, loopbit;
-+ int lps_precision = LPS_PREC;
-+
-+ lpj = (1<<12);
-+
-+ while ((lpj <<= 1) != 0) {
-+ /* wait for "start of" clock tick */
-+ ticks = jiffies;
-+ while (ticks == jiffies)
-+ /* nothing */;
-+
-+ /* Go .. */
-+ ticks = jiffies;
-+ __delay(lpj);
-+ ticks = jiffies - ticks;
-+ if (ticks)
-+ break;
-+ }
-+
-+ /*
-+ * Do a binary approximation to get lpj set to
-+ * equal one clock (up to lps_precision bits)
-+ */
-+ lpj >>= 1;
-+ loopbit = lpj;
-+ while (lps_precision-- && (loopbit >>= 1)) {
-+ lpj |= loopbit;
-+ ticks = jiffies;
-+ while (ticks == jiffies)
-+ /* nothing */;
-+ ticks = jiffies;
-+ __delay(lpj);
-+ if (jiffies != ticks) /* longer than 1 tick */
-+ lpj &= ~loopbit;
-+ }
-+ printk(KERN_INFO "%d CPUs re-calibrate udelay(lpj = %d)\n", NR_CPUS, lpj);
-+
-+ for(i=0; i< NR_CPUS; i++)
-+ cpu_data[i].udelay_val = lpj;
-+
-+ return 0;
-+}
-+device_initcall(udelay_recal);
-+
- void prom_soc_init(struct ralink_soc_info *soc_info)
- {
- void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
---- a/arch/mips/ralink/Kconfig
-+++ b/arch/mips/ralink/Kconfig
-@@ -57,6 +57,7 @@ choice
- select CLKSRC_MIPS_GIC
- select HW_HAS_PCI
- select WEAK_REORDERING_BEYOND_LLSC
-+ select GENERIC_CLOCKEVENTS_BROADCAST
- endchoice
-
- choice
---- a/arch/mips/ralink/timer-gic.c
-+++ b/arch/mips/ralink/timer-gic.c
-@@ -12,6 +12,7 @@
- #include <linux/of.h>
- #include <linux/clk-provider.h>
- #include <linux/clocksource.h>
-+#include <asm/time.h>
-
- #include "common.h"
-
-@@ -19,6 +20,8 @@ void __init plat_time_init(void)
- {
- ralink_of_remap();
-
-+ mips_hpt_frequency = 880000000 / 2;
-+
- of_clk_init(NULL);
- clocksource_probe();
- }