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| author | John Crispin <john@phrozen.org> | 2017-07-05 07:52:36 +0200 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2017-07-06 06:37:03 +0200 |
| commit | fddc78bc116bc043fb5cd92dbc45cfd054c21af8 (patch) | |
| tree | bb82a2b964986ddaec87414ab6b7b19b43ebc8b8 /target/linux/ramips/patches-4.4/0086-usbphy.patch | |
| parent | 05d6e92594c507dcd1f4be6c1bcb2282fe1abe1f (diff) | |
| download | upstream-fddc78bc116bc043fb5cd92dbc45cfd054c21af8.tar.gz upstream-fddc78bc116bc043fb5cd92dbc45cfd054c21af8.tar.bz2 upstream-fddc78bc116bc043fb5cd92dbc45cfd054c21af8.zip | |
ramips: bump to v4.9
Signed-off-by: John Crispin <john@phrozen.org>
Diffstat (limited to 'target/linux/ramips/patches-4.4/0086-usbphy.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.4/0086-usbphy.patch | 35 |
1 files changed, 0 insertions, 35 deletions
diff --git a/target/linux/ramips/patches-4.4/0086-usbphy.patch b/target/linux/ramips/patches-4.4/0086-usbphy.patch deleted file mode 100644 index 92265e6a5d..0000000000 --- a/target/linux/ramips/patches-4.4/0086-usbphy.patch +++ /dev/null @@ -1,35 +0,0 @@ ---- a/drivers/phy/phy-ralink-usb.c -+++ b/drivers/phy/phy-ralink-usb.c -@@ -34,19 +34,19 @@ - #define RT_SYSC_REG_CLKCFG1 0x030 - #define RT_SYSC_REG_USB_PHY_CFG 0x05c - --#define OFS_U2_PHY_AC0 0x00 --#define OFS_U2_PHY_AC1 0x04 --#define OFS_U2_PHY_AC2 0x08 --#define OFS_U2_PHY_ACR0 0x10 --#define OFS_U2_PHY_ACR1 0x14 --#define OFS_U2_PHY_ACR2 0x18 --#define OFS_U2_PHY_ACR3 0x1C --#define OFS_U2_PHY_ACR4 0x20 --#define OFS_U2_PHY_AMON0 0x24 --#define OFS_U2_PHY_DCR0 0x60 --#define OFS_U2_PHY_DCR1 0x64 --#define OFS_U2_PHY_DTM0 0x68 --#define OFS_U2_PHY_DTM1 0x6C -+#define OFS_U2_PHY_AC0 0x800 -+#define OFS_U2_PHY_AC1 0x804 -+#define OFS_U2_PHY_AC2 0x808 -+#define OFS_U2_PHY_ACR0 0x810 -+#define OFS_U2_PHY_ACR1 0x814 -+#define OFS_U2_PHY_ACR2 0x818 -+#define OFS_U2_PHY_ACR3 0x81C -+#define OFS_U2_PHY_ACR4 0x820 -+#define OFS_U2_PHY_AMON0 0x824 -+#define OFS_U2_PHY_DCR0 0x860 -+#define OFS_U2_PHY_DCR1 0x864 -+#define OFS_U2_PHY_DTM0 0x868 -+#define OFS_U2_PHY_DTM1 0x86C - - #define RT_RSTCTRL_UDEV BIT(25) - #define RT_RSTCTRL_UHST BIT(22) |