diff options
| author | Felix Fietkau <nbd@openwrt.org> | 2016-01-02 14:48:27 +0000 |
|---|---|---|
| committer | Felix Fietkau <nbd@openwrt.org> | 2016-01-02 14:48:27 +0000 |
| commit | c69ffda546522ae67544ad717a45abbc2ca3527f (patch) | |
| tree | fb2de31fd6d40b87d35e63d5b8e01a03e9f0bbf8 /target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch | |
| parent | 140be9f1a5915e952722813e60716a257d622f74 (diff) | |
| download | upstream-c69ffda546522ae67544ad717a45abbc2ca3527f.tar.gz upstream-c69ffda546522ae67544ad717a45abbc2ca3527f.tar.bz2 upstream-c69ffda546522ae67544ad717a45abbc2ca3527f.zip | |
ramips: clean up and refresh kernel patches
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 48070
Diffstat (limited to 'target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch')
| -rw-r--r-- | target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch b/target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch index 5aae36088f..f54acb8d36 100644 --- a/target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch +++ b/target/linux/ramips/patches-4.3/0021-arch-mips-ralink-add-mt7688-detection.patch @@ -10,8 +10,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org> arch/mips/ralink/mt7620.c | 21 ++++++++++++++++----- 3 files changed, 18 insertions(+), 5 deletions(-) -diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h -index 0ef882b..455d406 100644 --- a/arch/mips/include/asm/mach-ralink/mt7620.h +++ b/arch/mips/include/asm/mach-ralink/mt7620.h @@ -17,6 +17,7 @@ @@ -22,8 +20,6 @@ index 0ef882b..455d406 100644 #define SYSC_REG_CHIP_REV 0x0c #define SYSC_REG_SYSTEM_CONFIG0 0x10 #define SYSC_REG_SYSTEM_CONFIG1 0x14 -diff --git a/arch/mips/include/asm/mach-ralink/ralink_regs.h b/arch/mips/include/asm/mach-ralink/ralink_regs.h -index 8fcbd0f..69fbcec 100644 --- a/arch/mips/include/asm/mach-ralink/ralink_regs.h +++ b/arch/mips/include/asm/mach-ralink/ralink_regs.h @@ -24,6 +24,7 @@ enum ralink_soc_type { @@ -34,8 +30,6 @@ index 8fcbd0f..69fbcec 100644 }; extern enum ralink_soc_type ralink_soc; -diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c -index 41b4a3e..6975ed8 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -46,6 +46,9 @@ enum mt762x_soc_type mt762x_soc; @@ -67,7 +61,7 @@ index 41b4a3e..6975ed8 100644 /* * When the CPU goes into sleep mode, the BUS clock will be too low for * USB to function properly -@@ -548,8 +552,15 @@ void prom_soc_init(struct ralink_soc_info *soc_info) +@@ -548,8 +552,15 @@ void prom_soc_init(struct ralink_soc_inf soc_info->compatible = "ralink,mt7620n-soc"; } } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) { @@ -85,7 +79,7 @@ index 41b4a3e..6975ed8 100644 soc_info->compatible = "ralink,mt7628an-soc"; } else { panic("mt762x: unknown SoC, n0:%08x n1:%08x\n", n0, n1); -@@ -582,7 +593,7 @@ void prom_soc_init(struct ralink_soc_info *soc_info) +@@ -582,7 +593,7 @@ void prom_soc_init(struct ralink_soc_inf pr_info("Digital PMU set to %s control\n", (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw")); @@ -94,6 +88,3 @@ index 41b4a3e..6975ed8 100644 rt2880_pinmux_data = mt7628an_pinmux_data; else rt2880_pinmux_data = mt7620a_pinmux_data; --- -1.7.10.4 - |