aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch
diff options
context:
space:
mode:
authorJohn Crispin <john@openwrt.org>2015-12-10 19:06:32 +0000
committerJohn Crispin <john@openwrt.org>2015-12-10 19:06:32 +0000
commit6df4426245be87148d6aa75859951cb6351eb24c (patch)
tree57a361566f8a505f89b685125d9ab36bba289e19 /target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch
parentf2b0ae86983705c98a50ae845403e67c9c412f4d (diff)
downloadupstream-6df4426245be87148d6aa75859951cb6351eb24c.tar.gz
upstream-6df4426245be87148d6aa75859951cb6351eb24c.tar.bz2
upstream-6df4426245be87148d6aa75859951cb6351eb24c.zip
ralink: bump to the target to v4.3
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 47831
Diffstat (limited to 'target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch')
-rw-r--r--target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch53
1 files changed, 53 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch b/target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch
new file mode 100644
index 0000000000..e2a7d821ef
--- /dev/null
+++ b/target/linux/ramips/patches-4.3/0010-arch-mips-ralink-add-spi1-clocks.patch
@@ -0,0 +1,53 @@
+From 39ce22c870f4503bed5e451acfcab21eba3b6239 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sun, 27 Jul 2014 09:49:07 +0100
+Subject: [PATCH 10/53] arch: mips: ralink: add spi1 clocks
+
+based on f3bc64d6d1f21c1b92d75f233a37b75d77af6963
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ arch/mips/ralink/mt7620.c | 1 +
+ arch/mips/ralink/rt305x.c | 1 +
+ arch/mips/ralink/rt3883.c | 1 +
+ 3 files changed, 3 insertions(+)
+
+diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
+index 33a7e42..0ba49a1 100644
+--- a/arch/mips/ralink/mt7620.c
++++ b/arch/mips/ralink/mt7620.c
+@@ -427,6 +427,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("10000100.timer", periph_rate);
+ ralink_clk_add("10000120.watchdog", periph_rate);
+ ralink_clk_add("10000b00.spi", sys_rate);
++ ralink_clk_add("10000b40.spi", sys_rate);
+ ralink_clk_add("10000c00.uartlite", periph_rate);
+ ralink_clk_add("10180000.wmac", xtal_rate);
+
+diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
+index c40776a..eeb747a 100644
+--- a/arch/mips/ralink/rt305x.c
++++ b/arch/mips/ralink/rt305x.c
+@@ -202,6 +202,7 @@ void __init ralink_clk_init(void)
+
+ ralink_clk_add("cpu", cpu_rate);
+ ralink_clk_add("10000b00.spi", sys_rate);
++ ralink_clk_add("10000b40.spi", sys_rate);
+ ralink_clk_add("10000100.timer", wdt_rate);
+ ralink_clk_add("10000120.watchdog", wdt_rate);
+ ralink_clk_add("10000500.uart", uart_rate);
+diff --git a/arch/mips/ralink/rt3883.c b/arch/mips/ralink/rt3883.c
+index 86a535c..26827bc 100644
+--- a/arch/mips/ralink/rt3883.c
++++ b/arch/mips/ralink/rt3883.c
+@@ -109,6 +109,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("10000120.watchdog", sys_rate);
+ ralink_clk_add("10000500.uart", 40000000);
+ ralink_clk_add("10000b00.spi", sys_rate);
++ ralink_clk_add("10000b40.spi", sys_rate);
+ ralink_clk_add("10000c00.uartlite", 40000000);
+ ralink_clk_add("10100000.ethernet", sys_rate);
+ ralink_clk_add("10180000.wmac", 40000000);
+--
+1.7.10.4
+