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authorJonas Gorski <jogo@openwrt.org>2013-06-30 13:10:12 +0000
committerJonas Gorski <jogo@openwrt.org>2013-06-30 13:10:12 +0000
commit0d9f760f272f3ccb3abcaca8e678734b666e234c (patch)
tree14237dc1b483b6fefbf696164b80f594e9826e49 /target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch
parent6a4e78dca6ecd4325504f0a74cd1816275157eea (diff)
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kernel: update linux 3.9 to 3.9.8
Includes memory allocation fixes as well as several networking fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37103
Diffstat (limited to 'target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch')
-rw-r--r--target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch9
1 files changed, 2 insertions, 7 deletions
diff --git a/target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch b/target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch
index 5b9ac944a7..b56a734d01 100644
--- a/target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch
+++ b/target/linux/ramips/patches-3.9/0133-MIPS-ralink-add-verbose-pmu-info.patch
@@ -10,8 +10,6 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
arch/mips/ralink/mt7620.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
-diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
-index 28350d0..69729a5 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -20,6 +20,22 @@
@@ -37,7 +35,7 @@ index 28350d0..69729a5 100644
/* does the board have sdram or ddram */
static int dram_type;
-@@ -187,6 +203,8 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
+@@ -187,6 +203,8 @@ void prom_soc_init(struct ralink_soc_inf
u32 n1;
u32 rev;
u32 cfg0;
@@ -46,7 +44,7 @@ index 28350d0..69729a5 100644
n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
-@@ -234,4 +252,12 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
+@@ -234,4 +252,12 @@ void prom_soc_init(struct ralink_soc_inf
BUG();
}
soc_info->mem_base = MT7620_DRAM_BASE;
@@ -59,6 +57,3 @@ index 28350d0..69729a5 100644
+ pr_info("Digital PMU set to %s control\n",
+ (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
}
---
-1.7.10.4
-