ralink: set v3.10 as default

Signed-off-by: John Crispin <blogic@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37497 3c298f89-4303-0410-b956-a3cf2f4a3e73

1 files changed, 0 insertions, 119 deletions

diff --git a/target/linux/ramips/patches-3.9/0120-DT-MIPS-ralink-add-MT7620A-dts-files.patch b/target/linux/ramips/patches-3.9/0120-DT-MIPS-ralink-add-MT7620A-dts-files.patch
deleted file mode 100644
index 3d9a9fc245..0000000000
--- a/target/linux/ramips/patches-3.9/0120-DT-MIPS-ralink-add-MT7620A-dts-files.patch
+++ /dev/null
@@ -1,119 +0,0 @@
-From 248c7a2b678eee7da39363b1f097ea7eedceb435 Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Fri, 12 Apr 2013 06:27:41 +0000
-Subject: [PATCH 120/164] DT: MIPS: ralink: add MT7620A dts files
-
-Add a dtsi file for MT7620A SoC and a sample dts file.
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
-Acked-by: Grant Likely <grant.likely@secretlab.ca>
-Patchwork: http://patchwork.linux-mips.org/patch/5190/
----
- arch/mips/ralink/Kconfig              |    4 +++
- arch/mips/ralink/dts/Makefile         |    1 +
- arch/mips/ralink/dts/mt7620a.dtsi     |   58 +++++++++++++++++++++++++++++++++
- arch/mips/ralink/dts/mt7620a_eval.dts |   16 +++++++++
- 4 files changed, 79 insertions(+)
- create mode 100644 arch/mips/ralink/dts/mt7620a.dtsi
- create mode 100644 arch/mips/ralink/dts/mt7620a_eval.dts
-
---- a/arch/mips/ralink/Kconfig
-+++ b/arch/mips/ralink/Kconfig
-@@ -46,6 +46,10 @@ choice
- 		bool "RT3883 eval kit"
- 		depends on SOC_RT3883
- 
-+	config DTB_MT7620A_EVAL
-+		bool "MT7620A eval kit"
-+		depends on SOC_MT7620
-+
- endchoice
- 
- endif
---- a/arch/mips/ralink/dts/Makefile
-+++ b/arch/mips/ralink/dts/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
- obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
- obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
-+obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
---- /dev/null
-+++ b/arch/mips/ralink/dts/mt7620a.dtsi
-@@ -0,0 +1,58 @@
-+/ {
-+	#address-cells = <1>;
-+	#size-cells = <1>;
-+	compatible = "ralink,mtk7620a-soc";
-+
-+	cpus {
-+		cpu@0 {
-+			compatible = "mips,mips24KEc";
-+		};
-+	};
-+
-+	cpuintc: cpuintc@0 {
-+		#address-cells = <0>;
-+		#interrupt-cells = <1>;
-+		interrupt-controller;
-+		compatible = "mti,cpu-interrupt-controller";
-+	};
-+
-+	palmbus@10000000 {
-+		compatible = "palmbus";
-+		reg = <0x10000000 0x200000>;
-+                ranges = <0x0 0x10000000 0x1FFFFF>;
-+
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+
-+		sysc@0 {
-+			compatible = "ralink,mt7620a-sysc";
-+			reg = <0x0 0x100>;
-+		};
-+
-+		intc: intc@200 {
-+			compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
-+			reg = <0x200 0x100>;
-+
-+			interrupt-controller;
-+			#interrupt-cells = <1>;
-+
-+			interrupt-parent = <&cpuintc>;
-+			interrupts = <2>;
-+		};
-+
-+		memc@300 {
-+			compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
-+			reg = <0x300 0x100>;
-+		};
-+
-+		uartlite@c00 {
-+			compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
-+			reg = <0xc00 0x100>;
-+
-+			interrupt-parent = <&intc>;
-+			interrupts = <12>;
-+
-+			reg-shift = <2>;
-+		};
-+	};
-+};
---- /dev/null
-+++ b/arch/mips/ralink/dts/mt7620a_eval.dts
-@@ -0,0 +1,16 @@
-+/dts-v1/;
-+
-+/include/ "mt7620a.dtsi"
-+
-+/ {
-+	compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
-+	model = "Ralink MT7620A evaluation board";
-+
-+	memory@0 {
-+		reg = <0x0 0x2000000>;
-+	};
-+
-+	chosen {
-+		bootargs = "console=ttyS0,57600";
-+	};
-+};