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authorJohn Crispin <blogic@openwrt.org>2013-06-23 15:50:49 +0000
committerJohn Crispin <blogic@openwrt.org>2013-06-23 15:50:49 +0000
commit5f6caa26e516e578be547df489d2ae8900da58a5 (patch)
tree48ec89a784c8c7ebb382cb8486ed0021a07b6109 /target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch
parent21ee9d504d834133a99fecfd36f1a65f8df8c096 (diff)
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ralink: update patches
Signed-off-by: John Crispin <blogic@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37016 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch')
-rw-r--r--target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch40
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch b/target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch
new file mode 100644
index 0000000000..c18817e54d
--- /dev/null
+++ b/target/linux/ramips/patches-3.8/0017-MIPS-ralink-add-PCI-IRQ-handling.patch
@@ -0,0 +1,40 @@
+From 98ab228172e66e43766d9e2a0ddb73603c22dbd1 Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Wed, 10 Apr 2013 09:07:27 +0200
+Subject: [PATCH 17/79] MIPS: ralink: add PCI IRQ handling
+
+The Ralink IRQ code was not handling the PCI IRQ yet. Add this functionaility
+to make PCI work on rt3883.
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Patchwork: http://patchwork.linux-mips.org/patch/5165/
+---
+ arch/mips/ralink/irq.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/arch/mips/ralink/irq.c b/arch/mips/ralink/irq.c
+index 6d054c5..d9807d0 100644
+--- a/arch/mips/ralink/irq.c
++++ b/arch/mips/ralink/irq.c
+@@ -31,6 +31,7 @@
+ #define INTC_INT_GLOBAL BIT(31)
+
+ #define RALINK_CPU_IRQ_INTC (MIPS_CPU_IRQ_BASE + 2)
++#define RALINK_CPU_IRQ_PCI (MIPS_CPU_IRQ_BASE + 4)
+ #define RALINK_CPU_IRQ_FE (MIPS_CPU_IRQ_BASE + 5)
+ #define RALINK_CPU_IRQ_WIFI (MIPS_CPU_IRQ_BASE + 6)
+ #define RALINK_CPU_IRQ_COUNTER (MIPS_CPU_IRQ_BASE + 7)
+@@ -104,6 +105,9 @@ asmlinkage void plat_irq_dispatch(void)
+ else if (pending & STATUSF_IP6)
+ do_IRQ(RALINK_CPU_IRQ_WIFI);
+
++ else if (pending & STATUSF_IP4)
++ do_IRQ(RALINK_CPU_IRQ_PCI);
++
+ else if (pending & STATUSF_IP2)
+ do_IRQ(RALINK_CPU_IRQ_INTC);
+
+--
+1.7.10.4
+