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| author | John Crispin <john@openwrt.org> | 2015-08-17 06:18:30 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-08-17 06:18:30 +0000 |
| commit | aa4c6e27b42b4c4be07462c7e951a694fe38f500 (patch) | |
| tree | b463a0a8cb4d81b35986046050a3b068d2f31054 /target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch | |
| parent | b0b59a8e75242f1b9715dabf834df97d48d42cbc (diff) | |
| download | upstream-aa4c6e27b42b4c4be07462c7e951a694fe38f500.tar.gz upstream-aa4c6e27b42b4c4be07462c7e951a694fe38f500.tar.bz2 upstream-aa4c6e27b42b4c4be07462c7e951a694fe38f500.zip | |
ramips: reorder patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 46659
Diffstat (limited to 'target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch b/target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch new file mode 100644 index 0000000000..f6f94f0383 --- /dev/null +++ b/target/linux/ramips/patches-3.18/0071-mt7621-add-cpu-feature-overrides.patch @@ -0,0 +1,68 @@ +--- /dev/null ++++ b/arch/mips/include/asm/mach-ralink/mt7621/cpu-feature-overrides.h +@@ -0,0 +1,65 @@ ++/* ++ * Ralink MT7621 specific CPU feature overrides ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> ++ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> ++ * Copyright (C) 2015 Felix Fietkau <nbd@openwrt.org> ++ * ++ * This file was derived from: include/asm-mips/cpu-features.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * Copyright (C) 2004 Maciej W. Rozycki ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++#ifndef _MT7621_CPU_FEATURE_OVERRIDES_H ++#define _MT7621_CPU_FEATURE_OVERRIDES_H ++ ++#define cpu_has_tlb 1 ++#define cpu_has_4kex 1 ++#define cpu_has_3k_cache 0 ++#define cpu_has_4k_cache 1 ++#define cpu_has_tx39_cache 0 ++#define cpu_has_sb1_cache 0 ++#define cpu_has_fpu 0 ++#define cpu_has_32fpr 0 ++#define cpu_has_counter 1 ++#define cpu_has_watch 1 ++#define cpu_has_divec 1 ++ ++#define cpu_has_prefetch 1 ++#define cpu_has_ejtag 1 ++#define cpu_has_llsc 1 ++ ++#define cpu_has_mips16 1 ++#define cpu_has_mdmx 0 ++#define cpu_has_mips3d 0 ++#define cpu_has_smartmips 0 ++ ++#define cpu_has_mips32r1 1 ++#define cpu_has_mips32r2 1 ++#define cpu_has_mips64r1 0 ++#define cpu_has_mips64r2 0 ++ ++#define cpu_has_dsp 1 ++#define cpu_has_dsp2 0 ++#define cpu_has_mipsmt 1 ++ ++#define cpu_has_64bits 0 ++#define cpu_has_64bit_zero_reg 0 ++#define cpu_has_64bit_gp_regs 0 ++#define cpu_has_64bit_addresses 0 ++ ++#define cpu_dcache_line_size() 32 ++#define cpu_icache_line_size() 32 ++ ++#define cpu_has_dc_aliases 0 ++#define cpu_has_vtag_icache 0 ++ ++#define cpu_has_rixi 0 ++#define cpu_has_tlbinv 0 ++#define cpu_has_userlocal 1 ++ ++#endif /* _MT7621_CPU_FEATURE_OVERRIDES_H */ |