aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/ramips/patches-3.18/0054-DMA-ralink-add-rt2880-dma-engine.patch
diff options
context:
space:
mode:
authorJohn Crispin <john@openwrt.org>2015-08-17 06:15:49 +0000
committerJohn Crispin <john@openwrt.org>2015-08-17 06:15:49 +0000
commit87df7da757cf67f61ce5227de42a48f6e3bcd68b (patch)
treefd7ca43494efbe7385b46f5a45bd60a424e7f8f8 /target/linux/ramips/patches-3.18/0054-DMA-ralink-add-rt2880-dma-engine.patch
parent09851afd33145dc293f0e2900a6f61d0c90f1980 (diff)
downloadupstream-87df7da757cf67f61ce5227de42a48f6e3bcd68b.tar.gz
upstream-87df7da757cf67f61ce5227de42a48f6e3bcd68b.tar.bz2
upstream-87df7da757cf67f61ce5227de42a48f6e3bcd68b.zip
ramips: Fix MT7621 pinmux bits for uart3, uart2, mdio
The MT7621 uses a 2 bit wide configuration of the sdhci, spi, mdio, pcie, wdt, uart2 and uart3 in the GPIO_MODE register. It was correctly done for sdhci, spi, pcie and wdt, The same has to be done for uart3, uart2 and mdio. Signed-off-by: Sven Eckelmann <sven@open-mesh.com> SVN-Revision: 46645
Diffstat (limited to 'target/linux/ramips/patches-3.18/0054-DMA-ralink-add-rt2880-dma-engine.patch')
0 files changed, 0 insertions, 0 deletions