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author | John Crispin <john@openwrt.org> | 2013-07-15 10:06:55 +0000 |
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committer | John Crispin <john@openwrt.org> | 2013-07-15 10:06:55 +0000 |
commit | a0de18807ba35e1888f6ea8ada84695e46558262 (patch) | |
tree | cfebd84e00717863717511b879661c2dbb417434 /target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | |
parent | f75bba6f87dc756a60003c83495230d5f6b2d5e5 (diff) | |
download | upstream-a0de18807ba35e1888f6ea8ada84695e46558262.tar.gz upstream-a0de18807ba35e1888f6ea8ada84695e46558262.tar.bz2 upstream-a0de18807ba35e1888f6ea8ada84695e46558262.zip |
ramips: add ralink v3.10 support
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 37331
Diffstat (limited to 'target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch')
-rw-r--r-- | target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch b/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch new file mode 100644 index 0000000000..c777419f12 --- /dev/null +++ b/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch @@ -0,0 +1,39 @@ +From 3f6b346e1dd83c4f43d94aefa0520ffdfafd5f0b Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 20 May 2013 20:30:11 +0200 +Subject: [PATCH 05/33] MIPS: ralink: make mt7620 ram detect verbose + +Make the code print which of SDRAM, DDR1 or DDR2 was detected. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/mt7620.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c +index 0018b1a..ccdec5a 100644 +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -214,16 +214,19 @@ void prom_soc_init(struct ralink_soc_info *soc_info) + + switch (dram_type) { + case SYSCFG0_DRAM_TYPE_SDRAM: ++ pr_info("Board has SDRAM\n"); + soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; + soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR1: ++ pr_info("Board has DDR1\n"); + soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR2: ++ pr_info("Board has DDR2\n"); + soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; + break; +-- +1.7.10.4 + |