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author | Michael Pratt <mcpratt@pm.me> | 2021-06-01 23:01:26 -0400 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2022-04-19 14:48:21 +0200 |
commit | 01bbed74445f82a0da8c414b132762fe2aed1344 (patch) | |
tree | 5f6269944b2b140f7847840c36a7344847659166 /target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c | |
parent | 6491212ea7067bbb4af3873412051c8fae8e477c (diff) | |
download | upstream-01bbed74445f82a0da8c414b132762fe2aed1344.tar.gz upstream-01bbed74445f82a0da8c414b132762fe2aed1344.tar.bz2 upstream-01bbed74445f82a0da8c414b132762fe2aed1344.zip |
ramips: mt7620: fix ethernet driver GMAC port init
A workaround was added to the switch driver
to set SOC port 4 as an RGMII GMAC interface
based on the DTS property mediatek,port4-gmac.
(previously mediatek,port4)
However, the ethernet driver already does this,
but is being blocked by a return statement
whenever the phy-handle and fixed-link properties
are both missing from nodes that define the port properties.
Revert the workaround, so that both the switch driver
and ethernet driver are not doing the same thing
and move the phy-handle related lines down
so nothing is ending the function prematurely.
While at it, clean up kernel messages
and delete useless return statements.
Fixes: f6d81e2fa1f1 ("mt7620: gsw: make IntPHY and ExtPHY share mdio addr 4 possible")
Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit afd60d650e769e9578eac5bb3647807f683aaf7c)
Diffstat (limited to 'target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c')
-rw-r--r-- | target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c index 798dc919bc..2a34e9417d 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/gsw_mt7620.c @@ -211,12 +211,6 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) _mt7620_mii_write(gsw, gsw->ephy_base + 4, 4, 0x05e1); _mt7620_mii_write(gsw, gsw->ephy_base + 4, 16, 0x1313); pr_info("gsw: setting port4 to ephy mode\n"); - } else if (!mdio_mode) { - u32 val = rt_sysc_r32(SYSC_REG_CFG1); - - val &= ~(3 << 14); - rt_sysc_w32(val, SYSC_REG_CFG1); - pr_info("gsw: setting port4 to gmac mode\n"); } } |