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| author | Gabor Juhos <juhosg@openwrt.org> | 2012-09-27 10:18:15 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-09-27 10:18:15 +0000 |
| commit | e3bcbeb4277ad59a7c11f14e84aa5cb503c81543 (patch) | |
| tree | 31f510fbe10a81b76997f04e8ab7aa04f40c518b /target/linux/ramips/files/arch/mips | |
| parent | 80d2da9f0ffcc665ac7a383b571bc07574dd3aff (diff) | |
| download | upstream-e3bcbeb4277ad59a7c11f14e84aa5cb503c81543.tar.gz upstream-e3bcbeb4277ad59a7c11f14e84aa5cb503c81543.tar.bz2 upstream-e3bcbeb4277ad59a7c11f14e84aa5cb503c81543.zip | |
ramips: add memory detection code for RT5350
SVN-Revision: 33571
Diffstat (limited to 'target/linux/ramips/files/arch/mips')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | 7 | ||||
| -rw-r--r-- | target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c | 38 |
2 files changed, 44 insertions, 1 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index 930b3337b9..949232dbd2 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -103,6 +103,13 @@ #define RT5350_SYSCFG0_CPUCLK_360 0x0 #define RT5350_SYSCFG0_CPUCLK_320 0x2 #define RT5350_SYSCFG0_CPUCLK_300 0x3 +#define RT5350_SYSCFG0_DRAM_SIZE_SHIFT 12 +#define RT5350_SYSCFG0_DRAM_SIZE_MASK 7 +#define RT5350_SYSCFG0_DRAM_SIZE_2M 0 +#define RT5350_SYSCFG0_DRAM_SIZE_8M 1 +#define RT5350_SYSCFG0_DRAM_SIZE_16M 2 +#define RT5350_SYSCFG0_DRAM_SIZE_32M 3 +#define RT5350_SYSCFG0_DRAM_SIZE_64M 4 #define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10) diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c index 856d869ebe..8a7a58b7d5 100644 --- a/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c +++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/rt305x.c @@ -26,6 +26,40 @@ void __iomem * rt305x_sysc_base; void __iomem * rt305x_memc_base; enum rt305x_soc_type rt305x_soc; +static unsigned long rt5350_get_mem_size(void) +{ + void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); + unsigned long ret; + u32 t; + + t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG); + t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) & + RT5350_SYSCFG0_DRAM_SIZE_MASK; + + switch (t) { + case RT5350_SYSCFG0_DRAM_SIZE_2M: + ret = 2 * 1024 * 1024; + break; + case RT5350_SYSCFG0_DRAM_SIZE_8M: + ret = 8 * 1024 * 1024; + break; + case RT5350_SYSCFG0_DRAM_SIZE_16M: + ret = 16 * 1024 * 1024; + break; + case RT5350_SYSCFG0_DRAM_SIZE_32M: + ret = 32 * 1024 * 1024; + break; + case RT5350_SYSCFG0_DRAM_SIZE_64M: + ret = 64 * 1024 * 1024; + break; + default: + panic("rt5350: invalid DRAM size: %u", t); + break; + } + + return ret; +} + void __init ramips_soc_prom_init(void) { void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); @@ -71,7 +105,9 @@ void __init ramips_soc_prom_init(void) ramips_mem_base = RT305X_SDRAM_BASE; - if (soc_is_rt305x() || soc_is_rt3350() || soc_is_rt5350()) { + if (soc_is_rt5350()) { + ramips_get_mem_size = rt5350_get_mem_size; + } else if (soc_is_rt305x() || soc_is_rt3350() ) { ramips_mem_size_min = RT305X_MEM_SIZE_MIN; ramips_mem_size_max = RT305X_MEM_SIZE_MAX; } else if (soc_is_rt3352()) { |