diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2012-04-21 12:30:47 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-04-21 12:30:47 +0000 |
| commit | 16459281356e9f8f7ec5d6b7bb7ef3ade8910483 (patch) | |
| tree | f8387d4e4de98b8a2a3dbe05ce6e45d95df6a8b3 /target/linux/ramips/files/arch/mips/include/asm | |
| parent | fb69e28eaf2499fad9c67aa0f41ebf587dc5d602 (diff) | |
| download | upstream-16459281356e9f8f7ec5d6b7bb7ef3ade8910483.tar.gz upstream-16459281356e9f8f7ec5d6b7bb7ef3ade8910483.tar.bz2 upstream-16459281356e9f8f7ec5d6b7bb7ef3ade8910483.zip | |
ramips: rt305x: fix CPU clock detection on RT3352
SVN-Revision: 31401
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index 9e1aa66429..e121582055 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -80,6 +80,11 @@ #define RT305X_SYSCFG_SRAM_CS0_MODE_WDT 1 #define RT305X_SYSCFG_SRAM_CS0_MODE_BTCOEX 2 +#define RT3352_SYSCFG0_CPUCLK_SHIFT 8 +#define RT3352_SYSCFG0_CPUCLK_MASK 0x1 +#define RT3352_SYSCFG0_CPUCLK_LOW 0x0 +#define RT3352_SYSCFG0_CPUCLK_HIGH 0x1 + #define RT305X_GPIO_MODE_I2C BIT(0) #define RT305X_GPIO_MODE_SPI BIT(1) #define RT305X_GPIO_MODE_UART0_SHIFT 2 |