diff options
| author | Gabor Juhos <juhosg@openwrt.org> | 2012-09-12 19:03:12 +0000 |
|---|---|---|
| committer | Gabor Juhos <juhosg@openwrt.org> | 2012-09-12 19:03:12 +0000 |
| commit | 0a42b02126bf220768fcece1ab9e82e302005808 (patch) | |
| tree | 854ea30ba5816b91c81b9261535f5f0f0aa58f9b /target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | |
| parent | 6804bafaddec8f36c7c8fd7b0a5469d35cf8bc7f (diff) | |
| download | upstream-0a42b02126bf220768fcece1ab9e82e302005808.tar.gz upstream-0a42b02126bf220768fcece1ab9e82e302005808.tar.bz2 upstream-0a42b02126bf220768fcece1ab9e82e302005808.zip | |
ramips/rt305x: add initial support for Rt5350 SoC
Somehow detecting the RAM size in common/setup.c doesn't
work here, it always detects 64M and then crashes on devices
with less RAM.
Probably using MEMC_REG_SDRAM_CFG1 to know the RAM size is how
it could be, for now I use the mem=32M kernel parameter to get
stuff working.
Signed-off-by: Daniel Golle <dgolle@allnet.de>
SVN-Revision: 33381
Diffstat (limited to 'target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h')
| -rw-r--r-- | target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h index db037a583a..930b3337b9 100644 --- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h +++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h @@ -76,6 +76,9 @@ #define RT3352_CHIP_NAME0 0x33335452 #define RT3352_CHIP_NAME1 0x20203235 +#define RT5350_CHIP_NAME0 0x33355452 +#define RT5350_CHIP_NAME1 0x20203035 + #define CHIP_ID_ID_MASK 0xff #define CHIP_ID_ID_SHIFT 8 #define CHIP_ID_REV_MASK 0xff @@ -95,6 +98,12 @@ #define RT3352_SYSCFG0_CPUCLK_LOW 0x0 #define RT3352_SYSCFG0_CPUCLK_HIGH 0x1 +#define RT5350_SYSCFG0_CPUCLK_SHIFT 8 +#define RT5350_SYSCFG0_CPUCLK_MASK 0x3 +#define RT5350_SYSCFG0_CPUCLK_360 0x0 +#define RT5350_SYSCFG0_CPUCLK_320 0x2 +#define RT5350_SYSCFG0_CPUCLK_300 0x3 + #define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10) #define RT3352_CLKCFG1_UPHY0_CLK_EN BIT(18) |