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authorMathias Kresin <dev@kresin.me>2018-08-15 18:34:57 +0200
committerMathias Kresin <dev@kresin.me>2018-08-16 21:20:57 +0200
commit1ea1f3a223d7a56f96de00001f59b077a6c4d237 (patch)
treecf44278a04d099b49fbd442444c9dc75c6d36e32 /target/linux/ramips/files-4.14
parent22ae14d0e7b882699f8512a75b4d06766aee4b78 (diff)
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ramips: mt7620: fix bad indent
Fix the indent to make the make it obvious which condition is the parent of the loop. Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux/ramips/files-4.14')
-rw-r--r--target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
index ecd056e27b..ffcf70c45a 100644
--- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
+++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c
@@ -154,13 +154,12 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode)
_mt7620_mii_write(gsw, 1, 31, 0x1000);
_mt7620_mii_write(gsw, 1, 17, 0xe7f8);
- /* turn on all PHYs */
- for (i = 0; i <= 4; i++) {
- val = _mt7620_mii_read(gsw, i, 0);
- val &= ~BIT(11);
- _mt7620_mii_write(gsw, i, 0, val);
- }
-
+ /* turn on all PHYs */
+ for (i = 0; i <= 4; i++) {
+ val = _mt7620_mii_read(gsw, i, 0);
+ val &= ~BIT(11);
+ _mt7620_mii_write(gsw, i, 0, val);
+ }
}
/* global page 0 */