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| author | Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us> | 2018-08-01 07:44:20 -0700 |
|---|---|---|
| committer | John Crispin <john@phrozen.org> | 2018-08-06 07:05:37 +0200 |
| commit | 5a6229a93df8a3f292094012a43410c6a24c210e (patch) | |
| tree | 34e722aee5cf4646ccc34c30a9158f6af4df96c1 /target/linux/ramips/files-4.14 | |
| parent | f72fa883b324311c1972c39ed521e536b25d674c (diff) | |
| download | upstream-5a6229a93df8a3f292094012a43410c6a24c210e.tar.gz upstream-5a6229a93df8a3f292094012a43410c6a24c210e.tar.bz2 upstream-5a6229a93df8a3f292094012a43410c6a24c210e.zip | |
ramips: remove superfluous & confusing DT binding
Mediatek has a reference platform that pairs an MT7620A with an MT7530W,
where the latter responds on MDIO address 0x1f while both chips respond on
0x0 to 0x4. The driver special-cases this arrangement to make sure it's
talking to the right chip, but two different ways in two different places.
This patch consolidates the detection without the current requirement of
both tests to be separately satisfied in the DTS.
Signed-off-by: Daniel Gimpelevich <daniel@gimpelevich.san-francisco.ca.us>
Diffstat (limited to 'target/linux/ramips/files-4.14')
| -rw-r--r-- | target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c index a4602c4586..192603a68c 100644 --- a/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c +++ b/target/linux/ramips/files-4.14/drivers/net/ethernet/mediatek/gsw_mt7620.c @@ -60,7 +60,28 @@ static irqreturn_t gsw_interrupt_mt7620(int irq, void *_priv) return IRQ_HANDLED; } -static void mt7620_hw_init(struct mt7620_gsw *gsw, struct device_node *np) +static int mt7620_mdio_mode(struct device_node *eth_node) +{ + struct device_node *phy_node, *mdiobus_node; + const __be32 *id; + int ret = 0; + + mdiobus_node = of_get_child_by_name(eth_node, "mdio-bus"); + + if (mdiobus_node) { + for_each_child_of_node(mdiobus_node, phy_node) { + id = of_get_property(phy_node, "reg", NULL); + if (id && (be32_to_cpu(*id) == 0x1f)) + ret = 1; + } + + of_node_put(mdiobus_node); + } + + return ret; +} + +static void mt7620_hw_init(struct mt7620_gsw *gsw, int mdio_mode) { u32 is_BGA = (rt_sysc_r32(0x0c) >> 16) & 1; @@ -70,7 +91,7 @@ static void mt7620_hw_init(struct mt7620_gsw *gsw, struct device_node *np) /* Enable MIB stats */ mtk_switch_w32(gsw, mtk_switch_r32(gsw, GSW_REG_MIB_CNT_EN) | (1 << 1), GSW_REG_MIB_CNT_EN); - if (of_property_read_bool(np, "mediatek,mt7530")) { + if (mdio_mode) { u32 val; /* turn off ephy and set phy base addr to 12 */ @@ -192,7 +213,7 @@ int mtk_gsw_init(struct fe_priv *priv) gsw = platform_get_drvdata(pdev); priv->soc->swpriv = gsw; - mt7620_hw_init(gsw, np); + mt7620_hw_init(gsw, mt7620_mdio_mode(priv->dev->of_node)); if (gsw->irq) { request_irq(gsw->irq, gsw_interrupt_mt7620, 0, |