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author | NOGUCHI Hiroshi <drvlabo@gmail.com> | 2019-07-26 08:11:48 +0900 |
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committer | Petr Štetiar <ynezz@true.cz> | 2019-07-26 08:09:16 +0200 |
commit | a1c6a316d2997b6bbee520fb1bf21f3b994f9e52 (patch) | |
tree | 0b883afb24d53a30bd2416ebc6e1b0c1f531b8f3 /target/linux/ramips/dts | |
parent | 5cf897779eacf63cdbcdebd1af68c109096665c6 (diff) | |
download | upstream-a1c6a316d2997b6bbee520fb1bf21f3b994f9e52.tar.gz upstream-a1c6a316d2997b6bbee520fb1bf21f3b994f9e52.tar.bz2 upstream-a1c6a316d2997b6bbee520fb1bf21f3b994f9e52.zip |
ramips: add support for Fon FON2601
FON2601 is a wireless router.
Specification:
- SoC: Mediatek MT7620A (580MHz)
- RAM: 128 MiB
- ROM: 16 MiB SPI Flash
- Wireless:
for 11b/g/n (upto 300 Mbps): MT7620A built-in WMAC
for 11a/n/ac (upto 867 Mbps): MT7662E
- Ethernet LAN: 1 port, upto 100 Mbps
- Ethernet WAN: 1 port, upto 1000 Mbps
- USB: 1 port (USB 2.0 host)
- LEDs: 4 (all can be controlled by SoC's GPIO)
- buttons: 1 (Displayed as "WPS" on enclosure)
- serial port: 57600n8
pins: Vcc(3.3V), Rx, Tx, GND
(left to right, viewed from outside of board)
Installation (only available via UART):
1. download sysupgrade binary image by wget command
2. write sysupgrade binary image to Flash
command is:
mtd write sysupgrade.bin firmware
3. reboot
Important Notice:
Only one button is displayed as "WPS" on enclosure.
However, it is configured as "reset" (factory resetting feature).
Signed-off-by: NOGUCHI Hiroshi <drvlabo@gmail.com>
[removed unrelated openwrt-keyring revert, missing -Wall for uimage_padhdr]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r-- | target/linux/ramips/dts/mt7620a_fon_fon2601.dts | 166 |
1 files changed, 166 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7620a_fon_fon2601.dts b/target/linux/ramips/dts/mt7620a_fon_fon2601.dts new file mode 100644 index 0000000000..33329a1049 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_fon_fon2601.dts @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include "mt7620a.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + compatible = "fon,fon2601", "ralink,mt7620a-soc"; + model = "Fon FON2601"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power_r { + label = "fon2601:red:power"; + gpios = <&gpio0 9 GPIO_ACTIVE_LOW>; + }; + + internet_g { + label = "fon2601:green:internet"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; + + net_g { + label = "fon2601:green:net"; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + + wifi_g { + label = "fon2601:green:wifi"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = <KEY_RESTART>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + compatible = "fonfxc,uimage"; + label = "firmware"; + reg = <0x50000 0xf90000>; + }; + + partition@fe0000 { + label = "board_data"; + reg = <0xfe0000 0x20000>; + read-only; + }; + }; + }; +}; + +&state_default { + gpio { + ralink,group = "i2c", "uartf"; + ralink,function = "gpio"; + }; + nd_sd { + ralink,group = "nd_sd"; + ralink,function = "sd"; + }; + spi_cs { + ralink,group = "spi refclk"; + ralink,function = "spi refclk"; + }; +}; + +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii2_pins &mdio_pins>; + + mtd-mac-address = <&factory 0x4>; + + port@4 { + status = "okay"; + phy-handle = <&phy4>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + }; +}; + +&gsw { + mediatek,port4 = "gmac"; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pa_pins>, <&wled_pins>; +}; + +&pcie { + status = "okay"; +}; +&pcie0 { + wifi@0,0 { + compatible = "pci14c3,7662"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; |