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author | John Crispin <john@openwrt.org> | 2015-09-14 20:09:31 +0000 |
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committer | John Crispin <john@openwrt.org> | 2015-09-14 20:09:31 +0000 |
commit | 57c5910535ebf5fbee20213ddaf67da118629cb9 (patch) | |
tree | a3f2bcdcc558e396658a7546e0679b6d78437002 /target/linux/ramips/dts | |
parent | 2c1d56af50ab19c545218b1e66a5e3100f7da166 (diff) | |
download | upstream-57c5910535ebf5fbee20213ddaf67da118629cb9.tar.gz upstream-57c5910535ebf5fbee20213ddaf67da118629cb9.tar.bz2 upstream-57c5910535ebf5fbee20213ddaf67da118629cb9.zip |
ramips: Added WIZnet WizFi630A Platform based on Ralink RT5350
This patch is to add the WIZnet WizFi630A board as a new platform. The board is in mini pci express form factor.
Signed-off-by: Tobias Welz <tw@wiznet.eu>
SVN-Revision: 46921
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r-- | target/linux/ramips/dts/WIZFI630A.dts | 180 |
1 files changed, 180 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/WIZFI630A.dts b/target/linux/ramips/dts/WIZFI630A.dts new file mode 100644 index 0000000000..f2818ce9df --- /dev/null +++ b/target/linux/ramips/dts/WIZFI630A.dts @@ -0,0 +1,180 @@ +/dts-v1/; + +/include/ "rt5350.dtsi" + +/ { + compatible = "wizfi630a", "ralink,rt5350-soc"; + model = "WIZnet WizFi630A"; + + chosen { + bootargs = "console=ttyS1,115200"; + }; + + palmbus@10000000 { + gpio1: gpio@660 { + status = "okay"; + }; + + spi@b00 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25q128"; + reg = <0>; + linux,modalias = "m25p80", "w25q128"; + spi-max-frequency = <10000000>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "uboot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "firmware"; + reg = <0x50000 0xfb0000>; + }; + }; + }; + + uart@500 { + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0x500 0x100>; + resets = <&rstctrl 12>; + reset-names = "uart"; + interrupt-parent = <&intc>; + interrupts = <5>; + reg-shift = <2>; + status = "okay"; + }; + + uartlite@c00 { + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a"; + reg = <0xc00 0x100>; + resets = <&rstctrl 19>; + reset-names = "uartl"; + interrupt-parent = <&intc>; + interrupts = <12>; + reg-shift = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&uartlite_pins>; + }; + }; + + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "jtag" ; + ralink,function = "gpio"; + }; + }; + + uartf_gpio_pins: uartf_gpio { + uartf_gpio { + ralink,group = "uartf"; + ralink,function = "uartf"; + }; + }; + + uartlite_pins: uartlite { + uart { + ralink,group = "uartlite"; + ralink,function = "uartlite"; + }; + }; + }; + + ethernet@10100000 { + mtd-mac-address = <&factory 0x4>; + }; + + esw@10110000 { + ralink,portmap = <0x17>; + }; + + wmac@10180000 { + ralink,mtd-eeprom = <&factory 0>; + }; + + ehci@101c0000 { + status = "okay"; + }; + + ohci@101c1000 { + status = "okay"; + }; + + gpio-export { + compatible = "gpio-export"; + #size-cells = <0>; + }; + + gpio-leds { + compatible = "gpio-leds"; + + run { + label = "wizfi630a::run"; + gpios = <&gpio0 1 1>; + }; + + wps { + label = "wizfi630a::wps"; + gpios = <&gpio0 20 1>; + }; + + uart1 { + label = "wizfi630a::uart1"; + gpios = <&gpio0 18 1>; + }; + + uart2 { + label = "wizfi630a::uart2"; + gpios = <&gpio0 21 1>; + }; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <20>; + + reset { + label = "reset"; + gpios = <&gpio0 17 1>; + linux,code = <0x198>; + }; + + wps { + label = "wps"; + gpios = <&gpio0 0 1>; + linux,code = <0x211>; + }; + + scm1 { + label = "SCM1"; + gpios = <&gpio0 19 1>; + linux,code = <0x100>; + }; + + scm2 { + label = "SCM2"; + gpios = <&gpio0 2 1>; + linux,code = <0x101>; + }; + }; +}; |