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authorJohn Crispin <blogic@openwrt.org>2014-11-14 16:53:07 +0000
committerJohn Crispin <blogic@openwrt.org>2014-11-14 16:53:07 +0000
commitaa77ecd2b79054abe89f30906d12dec0f93c91fc (patch)
tree8b9abafddef937871840a91a60cab14a29595570 /target/linux/ramips/dts
parent82d17fb64a6508e8f6761fa7df37c07d9ff34f22 (diff)
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ralink: update pcie driver to load ranges from dts
Signed-off-by: John Crispin <blogic@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@43249 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/dts')
-rw-r--r--target/linux/ramips/dts/mt7620a.dtsi8
-rw-r--r--target/linux/ramips/dts/mt7621.dtsi84
-rw-r--r--target/linux/ramips/dts/mt7628an.dtsi8
3 files changed, 97 insertions, 3 deletions
diff --git a/target/linux/ramips/dts/mt7620a.dtsi b/target/linux/ramips/dts/mt7620a.dtsi
index 37b65600ef..4e116e0ebe 100644
--- a/target/linux/ramips/dts/mt7620a.dtsi
+++ b/target/linux/ramips/dts/mt7620a.dtsi
@@ -443,6 +443,14 @@
interrupt-parent = <&cpuintc>;
interrupts = <4>;
+ device_type = "pci";
+
+ bus-range = <0 255>;
+ ranges = <
+ 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
+ 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
+ >;
+
status = "disabled";
pcie-bridge {
diff --git a/target/linux/ramips/dts/mt7621.dtsi b/target/linux/ramips/dts/mt7621.dtsi
index 859749cce4..7130b67409 100644
--- a/target/linux/ramips/dts/mt7621.dtsi
+++ b/target/linux/ramips/dts/mt7621.dtsi
@@ -92,8 +92,8 @@
#address-cells = <1>;
#size-cells = <1>;
-/* pinctrl-names = "default";
- pinctrl-0 = <&spi_pins>;*/
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_pins>;
m25p80@0 {
#address-cells = <1>;
@@ -136,6 +136,84 @@
};
};
+ pinctrl {
+ compatible = "ralink,rt2880-pinmux";
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+ state_default: pinctrl0 {
+ };
+ spi_pins: spi {
+ spi {
+ ralink,group = "spi";
+ ralink,function = "spi";
+ };
+ };
+ i2c_pins: i2c {
+ i2c {
+ lantiq,group = "i2c";
+ lantiq,function = "i2c";
+ };
+ };
+ uart1_pins: uart1 {
+ uart1 {
+ ralink,group = "uart1";
+ ralink,function = "uart";
+ };
+ };
+ uart2_pins: uart2 {
+ uart2 {
+ ralink,group = "uart2";
+ ralink,function = "uart";
+ };
+ };
+ uart3_pins: uart3 {
+ uart3 {
+ ralink,group = "uart3";
+ ralink,function = "uart";
+ };
+ };
+ rgmii1_pins: rgmii1 {
+ rgmii1 {
+ ralink,group = "rgmii1";
+ ralink,function = "rgmii";
+ };
+ };
+ rgmii2_pins: rgmii2 {
+ rgmii2 {
+ ralink,group = "rgmii2";
+ ralink,function = "rgmii";
+ };
+ };
+ mdio_pins: mdio {
+ mdio {
+ ralink,group = "mdio";
+ ralink,function = "mdio";
+ };
+ };
+ pcie_pins: pcie {
+ pcie {
+ ralink,group = "pcie";
+ ralink,function = "pcie rst";
+ };
+ };
+ nand_pins: nand {
+ spi-nand {
+ ralink,group = "spi";
+ ralink,function = "nand";
+ };
+ sdhci-nand {
+ ralink,group = "sdhci";
+ ralink,function = "nand";
+ };
+ };
+ sdhci_pins: sdhci {
+ sdhci {
+ ralink,group = "sdhci";
+ ralink,function = "sdhci";
+ };
+ };
+ };
+
rstctrl: rstctrl {
compatible = "ralink,rt2880-reset";
#reset-cells = <1>;
@@ -150,7 +228,7 @@
};
xhci@1E1C0000 {
- compatible = "xhci-platform1";
+ compatible = "xhci-platform";
reg = <0x1E1C0000 4000>;
interrupt-parent = <&gic>;
diff --git a/target/linux/ramips/dts/mt7628an.dtsi b/target/linux/ramips/dts/mt7628an.dtsi
index f0cb7b5f50..3223e162bd 100644
--- a/target/linux/ramips/dts/mt7628an.dtsi
+++ b/target/linux/ramips/dts/mt7628an.dtsi
@@ -213,6 +213,14 @@
status = "disabled";
+ device_type = "pci";
+
+ bus-range = <0 255>;
+ ranges = <
+ 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
+ 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
+ >;
+
pcie-bridge {
reg = <0x0000 0 0 0 0>;